公开(公告)号：US09795029B2

公开(公告)日：2017-10-17

申请号：US15138040

申请日：2016-04-25

Applicant: NHK SPRING CO., LTD.

Inventor： Yukie Yamada

IPC: G11B5/48 ,  H05K1/02 ,  G11B5/60 ,  H05K1/05 ,  H05K3/28

CPC classification number: H05K1/028 ,  G11B5/484 ,  G11B5/4853 ,  G11B5/486 ,  G11B5/60 ,  H05K1/056 ,  H05K3/28 ,  H05K2201/09872 ,  H05K2203/0323

Abstract: Provided is a wiring thin plate capable of suppressing deterioration of an electric characteristic and variation in thickness of an aerial wiring portion while advancing reduction of rigidity of the aerial wiring portion. The wiring thin plate includes an aerial wiring portion including wiring traces and passing over an airspace, aerial base layers provided at the respective wiring traces in the aerial wiring portion and being apart from each other, and an aerial cover layer provided in the aerial wiring portion and spanning from the wiring traces of the aerial wiring portion through the aerial base layers to interspaces between adjacent aerial base layers of said aerial base layers.

公开(公告)号：US20170223846A1

公开(公告)日：2017-08-03

申请号：US15119559

申请日：2015-03-04

Applicant: MC10, INC.

Inventor： Brian Elolampi ,  David G. Garlock ,  Harold Gaudette ,  Steven Fastert ,  Adam Standley ,  Yung-Yu Hsu

IPC: H05K5/00 ,  H05K5/06 ,  H05K3/32 ,  H05K1/18

CPC classification number: H05K5/0034 ,  H05K1/181 ,  H05K1/189 ,  H05K3/284 ,  H05K3/32 ,  H05K5/0056 ,  H05K5/006 ,  H05K5/065 ,  H05K2201/09063 ,  H05K2201/09872 ,  H05K2201/10151 ,  H05K2203/1311 ,  H05K2203/1316

Abstract: Encapsulated conformal electronic devices, encapsulated conformal integrated circuit (IC) systems, and methods of making and using encapsulated conformal electronic devices are presented herein. A conformal IC device is disclosed which includes a flexible substrate, electronic circuitry attached to the flexible substrate, and a flexible multi-part encapsulation housing encasing therein the electronic circuitry and flexible substrate. The multi-part housing includes first and second encapsulation housing components. The first encapsulation housing component has recessed regions for seating therein the electronic circuitry, while the second encapsulation housing component has recessed regions for seating therein the flexible substrate. First encapsulation housing component optionally includes a recessed region for seating therein the flexible substrate. Either housing component may include one or more projections that pass through holes in the substrate to engage complementary depressions in the other housing component to thereby align and interlock the encapsulation housing components with the flexible substrate and electronic circuitry.

公开(公告)号：US20160345437A1

公开(公告)日：2016-11-24

申请号：US15158645

申请日：2016-05-19

Applicant: TactoTek Oy

Inventor： Mikko HEIKKINEN ,  Jarmo SÄÄSKI ,  Jarkko TORVINEN

IPC: H05K1/18 ,  H01L33/62 ,  H01L33/52 ,  H01L33/48 ,  H01L31/0203 ,  H05K1/02 ,  H01L31/02

CPC classification number: H05K1/186 ,  H01L23/4985 ,  H01L23/5387 ,  H01L33/52 ,  H01L51/0097 ,  H01L2224/1319 ,  H01L2933/005 ,  H05K1/0274 ,  H05K1/0298 ,  H05K1/189 ,  H05K3/284 ,  H05K2201/0129 ,  H05K2201/05 ,  H05K2201/09872 ,  H05K2201/10106 ,  H05K2201/10151 ,  H05K2203/1316 ,  H05K2203/1322

Abstract: A multilayer structure for an electronic device having a flexible substrate film (202) for accommodating electronics (204); at least one electronic component (204) provided on said substrate film (202); and a number of conductive traces (206) provided on said substrate film (202) for electrically powering and/or connecting electronics including said at least one electronic component (204), wherein at least one preferably thermoformed cover (210) is attached to said substrate film (202) on top of said at least one electronic component (204), the at least one thermoformed cover (210) and the substrate film (202) accommodating the electronics (204) being overmolded with thermoplastic material (208). The invention also relates to a method for manufacturing a multilayer structure for an electronic device

Abstract translation: 一种用于电子设备的多层结构，其具有用于容纳电子设备（204）的柔性基底膜（202）。 设置在所述衬底膜（202）上的至少一个电子部件（204）; 以及设置在所述衬底膜（202）上的多个导电迹线（206），用于对包括所述至少一个电子部件（204）的电子元件进行电力供应和/或连接，其中至少一个优选地，热成型盖（210）附接到所述 在所述至少一个电子部件（204）的顶部上的所述基底膜（202），所述至少一个热成型盖（210）和容纳所述电子器件（204）的所述基底膜（202）用热塑性材料（208）包覆成型。 本发明还涉及一种用于制造电子设备的多层结构的方法

公开(公告)号：US09425161B2

公开(公告)日：2016-08-23

申请号：US14808779

申请日：2015-07-24

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： Lakshminarayan Viswanathan ,  L. M. Mahalingam ,  David F. Abdo ,  Jaynal A. Molla

IPC: H01L23/52 ,  H01L23/00 ,  B23K20/02 ,  B23K35/02 ,  B23K20/24 ,  B23K20/16 ,  B23K20/10 ,  B23K20/00 ,  H01L23/31 ,  H05K3/28

CPC classification number: H01L24/73 ,  B23K20/002 ,  B23K20/023 ,  B23K20/10 ,  B23K20/16 ,  B23K20/24 ,  B23K35/0244 ,  H01L23/3107 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/75 ,  H01L24/83 ,  H01L24/95 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29364 ,  H01L2224/32225 ,  H01L2224/32238 ,  H01L2224/32245 ,  H01L2224/32258 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/75315 ,  H01L2224/75317 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/83365 ,  H01L2224/83385 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/8348 ,  H01L2224/83484 ,  H01L2224/8384 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01322 ,  H01L2924/04541 ,  H01L2924/04642 ,  H01L2924/0503 ,  H01L2924/1306 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/15786 ,  H01L2924/15793 ,  H01L2924/181 ,  H05K3/284 ,  H05K2201/09872 ,  H05K2201/2072 ,  H05K2203/1322 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599

Abstract: An embodiment of a method of attaching a semiconductor die to a substrate includes placing a bottom surface of the die over a top surface of the substrate with an intervening die attach material. The method further includes contacting a top surface of the semiconductor die and the top surface of the substrate with a conformal structure that includes a non-solid, pressure transmissive material, and applying a pressure to the conformal structure. The pressure is transmitted by the non-solid, pressure transmissive material to the top surface of the semiconductor die. The method further includes, while applying the pressure, exposing the assembly to a temperature that is sufficient to cause the die attach material to sinter. Before placing the die over the substrate, conductive mechanical lock features may be formed on the top surface of the substrate, and/or on the bottom surface of the semiconductor die.

Abstract translation: 将半导体管芯附接到衬底的方法的实施例包括使用插入的管芯附着材料将管芯的底表面放置在衬底的顶表面上。 该方法还包括使半导体管芯的顶表面和衬底的顶表面与保形结构接触，该保形结构包括非固体，压力传递材料，并向保形结构施加压力。 压力通过非固体的压力传递材料传递到半导体管芯的顶表面。 该方法还包括在施加压力的同时，将组件暴露于足以使管芯附着材料烧结的温度。 在将管芯置于衬底上之前，可以在衬底的顶表面和/或半导体管芯的底表面上形成导电的机械锁定特征。

公开(公告)号：US20150333031A1

公开(公告)日：2015-11-19

申请号：US14808779

申请日：2015-07-24

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： LAKSHMINARAYAN VISWANATHAN ,  L.M. MAHALINGAM ,  DAVID F. ABDO ,  JAYNAL A. MOLLA

IPC: H01L23/00 ,  H01L23/31

CPC classification number: H01L24/73 ,  B23K20/002 ,  B23K20/023 ,  B23K20/10 ,  B23K20/16 ,  B23K20/24 ,  B23K35/0244 ,  H01L23/3107 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/75 ,  H01L24/83 ,  H01L24/95 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29364 ,  H01L2224/32225 ,  H01L2224/32238 ,  H01L2224/32245 ,  H01L2224/32258 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/75315 ,  H01L2224/75317 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/83365 ,  H01L2224/83385 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/8348 ,  H01L2224/83484 ,  H01L2224/8384 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01322 ,  H01L2924/04541 ,  H01L2924/04642 ,  H01L2924/0503 ,  H01L2924/1306 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/15786 ,  H01L2924/15793 ,  H01L2924/181 ,  H05K3/284 ,  H05K2201/09872 ,  H05K2201/2072 ,  H05K2203/1322 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599

Abstract: An embodiment of a method of attaching a semiconductor die to a substrate includes placing a bottom surface of the die over a top surface of the substrate with an intervening die attach material. The method further includes contacting a top surface of the semiconductor die and the top surface of the substrate with a conformal structure that includes a non-solid, pressure transmissive material, and applying a pressure to the conformal structure. The pressure is transmitted by the non-solid, pressure transmissive material to the top surface of the semiconductor die. The method further includes, while applying the pressure, exposing the assembly to a temperature that is sufficient to cause the die attach material to sinter. Before placing the die over the substrate, conductive mechanical lock features may be formed on the top surface of the substrate, and/or on the bottom surface of the semiconductor die.

Abstract translation: 将半导体管芯附接到衬底的方法的实施例包括使用插入的管芯附着材料将管芯的底表面放置在衬底的顶表面上。 该方法还包括使半导体管芯的顶表面和衬底的顶表面与保形结构接触，该保形结构包括非固体，压力传递材料，并向保形结构施加压力。 压力通过非固体的压力传递材料传递到半导体管芯的顶表面。 该方法还包括在施加压力的同时，将组件暴露于足以使管芯附着材料烧结的温度。 在将管芯置于衬底上之前，可以在衬底的顶表面和/或半导体管芯的底表面上形成导电的机械锁定特征。

公开(公告)号：US20150201499A1

公开(公告)日：2015-07-16

申请号：US14153071

申请日：2014-01-12

Applicant: Zohar SHINAR ,  Joel VIDAL

Inventor： Zohar SHINAR ,  Joel VIDAL

IPC: H05K3/12 ,  B29C67/00

CPC classification number: H05K3/125 ,  B29C64/112 ,  B29C64/135 ,  B29C64/386 ,  B29C70/882 ,  B29K2105/0058 ,  B29K2995/0005 ,  B29K2995/0006 ,  B29K2995/0007 ,  B29L2031/3406 ,  B29L2031/3425 ,  B33Y30/00 ,  B33Y50/02 ,  B33Y80/00 ,  H05K1/0206 ,  H05K1/025 ,  H05K1/0253 ,  H05K1/0268 ,  H05K1/0269 ,  H05K1/0274 ,  H05K1/028 ,  H05K1/0281 ,  H05K1/0284 ,  H05K1/092 ,  H05K1/165 ,  H05K1/167 ,  H05K1/186 ,  H05K3/0005 ,  H05K3/1283 ,  H05K3/225 ,  H05K3/284 ,  H05K3/4007 ,  H05K3/4069 ,  H05K3/4664 ,  H05K3/4685 ,  H05K3/4688 ,  H05K2201/0367 ,  H05K2201/037 ,  H05K2201/0391 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/098 ,  H05K2201/09836 ,  H05K2201/09845 ,  H05K2201/09872 ,  H05K2201/10098 ,  H05K2203/013 ,  H05K2203/107 ,  H05K2203/163 ,  H05K2203/166

Abstract: Device, system, and method of three-dimensional printing. A device includes: a first 3D-printing head to selectively discharge conductive 3D-printing material; a second 3D-printing head to selectively discharge insulating 3D-printing material; and a processor to control operations of the first and second 3D-printing heads based on a computer-aided design (CAD) scheme describing a printed circuit board (PCB) intended for 3D-printing. A 3D-printer device utilizes 3D-printing methods, in order to 3D-print: (a) a functional multi-layer PCB; or (b) a functional stand-alone electric component; or (c) a functional PCB having an embedded or integrated electric component, both of them 3D-printed in a unified 3D-printing process.

Abstract translation: 三维打印的设备，系统和方法。 一种装置包括：第一3D打印头，用于选择性地排放导电3D打印材料; 第二3D打印头，用于选择性地放电绝缘3D打印材料; 以及基于描述用于3D打印的印刷电路板（PCB）的计算机辅助设计（CAD）方案来控制第一和第二3D打印头的操作的处理器。 3D打印机设备利用3D打印方法，以便3D打印：（a）功能性多层PCB; 或（b）功能独立电气部件; 或（c）具有嵌入或集成电气部件的功能PCB，它们都以统一的3D打印过程3D打印。

公开(公告)号：US20150197642A1

公开(公告)日：2015-07-16

申请号：US14156635

申请日：2014-01-16

Applicant: International Business Machines Corporation

Inventor： Dylan J. Boday ,  Joseph Kuczynski ,  Jason T. Wertz ,  Jing Zhang

IPC: C09D5/08 ,  C09D183/04 ,  H05K7/02 ,  H05K3/28

CPC classification number: C09D5/10 ,  C08K3/015 ,  C08K2003/0806 ,  C08K2003/085 ,  C09D5/084 ,  C09D7/67 ,  C09D7/68 ,  C09D183/04 ,  C23F15/00 ,  H05K1/09 ,  H05K1/181 ,  H05K3/284 ,  H05K3/285 ,  H05K2201/0215 ,  H05K2201/0257 ,  H05K2201/09872 ,  H05K2201/10022 ,  H05K2201/10636 ,  Y02P70/611

Abstract: A conformal coating composition for protecting a metal surface from sulfur related corrosion includes a polymer and metal nanoparticles blended with the polymer. In accordance with some embodiments of the present invention, an apparatus includes an electronic component mounted on a substrate, metal conductors electronically connecting the electronic component, and a polymer conformal coating containing metal nanoparticles overlying the metal conductors. Accordingly, the metal nanoparticle-containing conformal coating is able to protect the metal conductors from corrosion caused by sulfur components (e.g., elemental sulfur, hydrogen sulfide, and/or sulfur oxides) in the air. That is, the metal nanoparticles in the conformal coating react with any corrosion inducing sulfur component in the air and prevent the sulfur component from reacting with the underlying metal conductors.

Abstract translation: 用于保护金属表面免受硫相关腐蚀的保形涂料组合物包括与聚合物共混的聚合物和金属纳米颗粒。 根据本发明的一些实施例，一种装置包括安装在基板上的电子部件，电子连接电子部件的金属导体和包含覆盖金属导体的金属纳米颗粒的聚合物保形涂层。 因此，含金属纳米颗粒的保形涂层能够保护金属导体免受空气中的硫成分（例如元素硫，硫化氢和/或硫氧化物）引起的腐蚀。 也就是说，保形涂层中的金属纳米颗粒与空气中的任何腐蚀诱导的硫成分反应，并防止硫成分与下面的金属导体反应。

公开(公告)号：US08995146B2

公开(公告)日：2015-03-31

申请号：US13527305

申请日：2012-06-19

Applicant: Andrew Simon Hall Brooks ,  Timothy Allan Von Werne

Inventor： Andrew Simon Hall Brooks ,  Timothy Allan Von Werne

IPC: H05K7/02 ,  H05K7/06 ,  H05K7/08 ,  H05K7/10 ,  H05K3/28

CPC classification number: H05K3/284 ,  H05K2201/015 ,  H05K2201/09872 ,  H05K2201/10121 ,  H05K2203/095

Abstract: An electrical or electro-optical assembly comprising a substrate comprising an insulating material, at least one conductive track present on at least one surface of the substrate, at least one electrical or electro-optical component connected to at least one of the at least one conductive track, and a continuous coating comprising one or more plasma-polymerized polymers completely covering the at least one surface of the substrate, the at least one conductive track and the at least one electrical or electro-optical component.

Abstract translation: 一种电气或电光学组件，包括包括绝缘材料的衬底，存在于衬底的至少一个表面上的至少一个导电轨道，至少一个电或电光学部件，其连接到至少一个导电 轨道和连续涂层，其包含完全覆盖基底的至少一个表面，所述至少一个导电轨道和至少一个电或电光部件的一个或多个等离子体聚合的聚合物。

公开(公告)号：US08947889B2

公开(公告)日：2015-02-03

申请号：US13211131

申请日：2011-08-16

Applicant: Matthew Kelley ,  Christian Adams ,  Richard Reim

Inventor： Matthew Kelley ,  Christian Adams ,  Richard Reim

IPC: H05K7/14 ,  H05K7/18 ,  H05K9/00 ,  H01L23/00 ,  H01L27/30 ,  H05K1/02 ,  H05K3/28

CPC classification number: H01L23/573 ,  H01L27/305 ,  H01L27/308 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/3011 ,  H05K1/0275 ,  H05K3/284 ,  H05K2201/09872 ,  H01L2924/00

Abstract: A conformal electro-magnetic (EM) detector and a method of applying such a detector are provided herein as well as variations thereof Variations include, but are not limited to, single-element, area detectors; an array of multiple active elements.

Abstract translation: 本文提供了适形电磁（EM）检测器和应用这种检测器的方法及其变型。变化包括但不限于单元件区域检测器; 多个活动元素的数组。

公开(公告)号：US08907225B1

公开(公告)日：2014-12-09

申请号：US14221833

申请日：2014-03-21

Applicant: The United States of America as represented by the Secretary of the Navy

Inventor： Nishkamraj U Deshpande ,  H. Fred Barsun ,  Ron Shoultz

IPC: H05K1/02 ,  H05K3/28 ,  H01L23/31 ,  H05K3/30

CPC classification number: H05K1/0275 ,  H05K3/28 ,  H05K2201/0251 ,  H05K2201/026 ,  H05K2201/0769 ,  H05K2201/09872 ,  H05K2203/161 ,  Y10T29/49146 ,  Y10T428/1405

Abstract: A method and an apparatus for mitigating electrical failures caused by intrusive structures. Such structures can be tin whiskers forming on electrical circuits. In an illustrative embodiment, nano-capsules are filled with some type of insulative and adhesive fluid that is adapted to bind to and coat an intrusive structure, e.g., a whisker, making the whisker electrically inactive and thereby reducing the electrical faults that can be caused by the whisker. In another illustrative embodiment, randomly oriented nano-fibers having an elastic modulus higher than tin or any other whisker material is used to arrest a growth or movement of a whisker and further reduce a likelihood that a whisker can cause an electrical fault.

Abstract translation: 一种用于减轻由侵入式结构引起的电气故障的方法和装置。 这种结构可以是在电路上形成的锡晶须。 在说明性实施例中，纳米胶囊填充有某种类型的绝缘和粘合剂流体，其适于结合并涂覆侵入结构（例如晶须），使晶须电不活动，从而减少可能引起的电气故障 由晶须 在另一个说明性实施例中，使用弹性模量高于锡或任何其它晶须材料的随机取向的纳米纤维来阻止晶须的生长或移动，并进一步降低晶须可能导致电气故障的可能性。