MULTIPHASE ULTRA LOW K FILM FORMING METHOD
    5.
    发明专利

    公开(公告)号:JP2012109589A

    公开(公告)日:2012-06-07

    申请号:JP2011287303

    申请日:2011-12-28

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To provide an ultra low dielectric constant (k) film which has a dielectric constant of not greater than 2.7 and exhibits improved mechanical properties such as improved elastic modulus and hardness, and also provide a method of manufacturing the film.SOLUTION: A multiphase ultra low k dielectric film 44 includes atoms of Si, C, O and H, and has a dielectric constant of about 2.4 or less, nanosized pores or voids, an elastic modulus of about 5 or greater and a hardness of about 0.7 or greater. A preferred multiphase ultra low k dielectric film 44 includes atoms of Si, C, O and H, and has a dielectric constant of about 2.2 or less, nanosized pores or voids, an elastic modulus of about 3 or greater and a hardness of about 0.3 or greater.

    ULTRA LOW K (ULK) SICOH FILM AND METHOD
    8.
    发明申请
    ULTRA LOW K (ULK) SICOH FILM AND METHOD 审中-公开
    超低K(ULK)SICOH薄膜和方法

    公开(公告)号:WO2004083495A3

    公开(公告)日:2005-02-03

    申请号:PCT/US2004008195

    申请日:2004-03-17

    Abstract: The present invention provides a multiphase, ultra low k film exhibiting improved elastic modulus and hardness, and various methods for forming the same. The multiphase, ultra low k dielectric film includes atoms of Si, C, O and H, represented by (104), (103), (102) and (101) respectively, has a dielectric constant of about 2.4 or less, nanosized pores or voids, an elastic modulus of about 5 or greater and a hardness of about 0.7 or greater. A preferred film includes atoms of Si, C, O and H, has a dielectric constant of about 2.2 or less, nanosized pores or voids, an elastic modulus of about 3 or greater and a hardness of about 0.3 or greater. These films consist of a first phase (100) of "host" matrix that is a random network of hydrogenated oxidize silicon carbon material (SiCOH), and a second phase (105) consisting essentially of C and H atoms.

    Abstract translation: 本发明提供了具有改善的弹性模量和硬度的多相超低k膜及其形成方法。 多相超低k电介质膜分别由(104),(103),(102)和(101)表示的Si,C,O和H原子,介电常数约为2.4以下,纳米孔 或空隙,约5或更大的弹性模量和约0.7或更大的硬度。 优选的膜包括Si,C,O和H的原子,具有约2.2或更小的介电常数,纳米孔或空隙,约3或更大的弹性模量和约0.3或更大的硬度。 这些膜包括作为氢化氧化硅碳材料(SiCOH)的随机网络的第一相(100)“主体”基质和基本上由C和H原子组成的第二相(105)。

    INTERCONNECT STRUCTURE WITH A MUSHROOM-SHAPED OXIDE CAPPING LAYER AND METHOD FOR FABRICATING SAME
    9.
    发明申请
    INTERCONNECT STRUCTURE WITH A MUSHROOM-SHAPED OXIDE CAPPING LAYER AND METHOD FOR FABRICATING SAME 审中-公开
    具有蘑菇状氧化物覆盖层的互连结构及用于制造相同结构的方法

    公开(公告)号:WO2011084667A2

    公开(公告)日:2011-07-14

    申请号:PCT/US2010060933

    申请日:2010-12-17

    Abstract: An interconnect structure is provided that includes a dielectric material (52) having a dielectric constant of 4.0 or less and including a plurality of conductive features (56) embedded therein. The dielectric material (52) has an upper surface that is located beneath an upper surface of each of the plurality of conductive features (56). A first dielectric cap (58) is located on the upper surface of the dielectric material (52) and extends onto at least a portion of the upper surface of each of the plurality of conductive features (56). As shown, the first dielectric cap (58) forms an interface (59) with each of the plurality of conductive features (56) that is opposite to an electrical field that is generated by neighboring conductive features. The inventive structure also includes a second dielectric cap (60) located on an exposed portion of the upper surface of each of the plurality of conductive features (56) not covered with the first dielectric cap (58). The second dielectric cap (60) further covers on an exposed surface of the first dielectric cap (58).

    Abstract translation: 提供了一种互连结构,其包括介电常数为4.0或更小并且包括嵌入其中的多个导电部件(56)的介电材料(52)。 介电材料(52)具有位于多个导电部件(56)中的每一个的上表面下方的上表面。 第一电介质帽(58)位于电介质材料(52)的上表面上并且延伸到多个导电部件(56)中的每一个的上表面的至少一部分上。 如所示,第一电介质帽(58)与多个导电特征(56)中的每一个形成与由相邻导电特征产生的电场相反的界面(59)。 本发明的结构还包括位于未被第一电介质帽(58)覆盖的多个导电部件(56)中的每一个的上表面的暴露部分上的第二电介质帽(60)。 第二电介质帽(60)还覆盖在第一电介质帽(58)的暴露表面上。

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