Abstract:
PROBLEM TO BE SOLVED: To provide a low-k dielectric material with increased cohesive strength for use in electronic structures including interconnect and sensing structures. SOLUTION: The low-k dielectric material includes atoms of Si, C, O, and H in which a fraction of the C atoms are bonded as Si-CH 3 functional groups, and another fraction of the C atoms are bonded as Si-R-Si, wherein R is phenyl, -[CH 2 ] n -, (n is greater than or equal to 1), HC=CH, C=CH 2 , C≡C or a [S] n linkage, (n is as defined above). COPYRIGHT: (C)2006,JPO&NCIPI
Abstract translation:要解决的问题:提供具有增加的内聚强度的低k电介质材料,用于包括互连和感测结构的电子结构中。 解决方案:低k电介质材料包括Si,C,O和H的原子,其中C原子的一部分键合为Si-CH 3 S / S官能团,另一部分 的C原子键合为Si-R-Si,其中R是苯基, - (n大于或等于1) ,HC = CH,C = CH 2 SB>,C≡C或[S] n SB>键,(n如上所定义)。 版权所有(C)2006,JPO&NCIPI
Abstract:
A method for forming a ultralow dielectric constant layer with controlled biaxial stress is described incorporating the steps of forming a layer containing Si, C, O and H by one of PECVD and spin-on coating and curing the film in an environment containing very low concentrations of oxygen and water each less than 10 ppm. A material is also described by using the method with a dielectric constant of not more than 2.8. The invention overcomes the problem of forming films with low biaxial stress less than 46 MPa.
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor structure and electronic device, formed in high density, and having smaller structural dimensions and a more exact shape.SOLUTION: Semiconductor structures and electronic devices include at least one layer of an interfacial dielectric material located on an upper surface of a carbon-based material. The at least one layer of interfacial dielectric material has a short-range crystallographic bonding structure, typically hexagonal, that is the same as that of the carbon-based material and, as such, the at least one layer of interfacial dielectric material does not change the electronic structure of the carbon-based material. The presence of the at least one layer of interfacial dielectric material having the same short-range crystallographic bonding structure as that of the carbon-based material improves the interfacial bonding between the carbon-based material and any overlying material layer, including a dielectric material, a conductive material or a combination of a dielectric material and a conductive material. The improved interfacial bonding in turn facilitates formation of devices including a carbon-based material.
Abstract:
PROBLEM TO BE SOLVED: To provide a dielectric material containing elements of Si, C, O and H, having specific mechanical property values (tensile stress, elastic modulus, hardness, cohesive force, and crack speed in water) which provide stable ultralow-k film without deterioration arising from steam or integration processing. SOLUTION: The dielectric materials 34, 38 and 44 have dielectric constants of approximately 2.8 or less, tensile stress of less than 45 Mpa, elastic modulus of somewhere between 2 and 15 GPa, hardness between around 0.2 to 2 GPa. Additionally, an electronic device structure containing the dielectric materials and various methods for producing them are disclosed. COPYRIGHT: (C)2009,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To increase the densities of borophosphate-silicate glass and an oxide existing on the glass before forming a pattern, by exposing the glass and undoped oxide to a high temperature before a line patterning step, a contact etching step, and an ion implanting step. SOLUTION: After a dielectric layer of borophosphate-silicate glass having fluidity is stuck to the surface of a substrate, another dielectric layer of a material having no fluidity is stuck to the surface of the glass layer. Then, contact etching and a high dose of ion implantation are performed so that an undoped oxide composed of SiO2 existing on the dielectric layer having no fluidity can be exposed to a junction activating annealing temperature, namely, a high annealing temperature of about 800 deg.C to 1,100 deg.C. After the ion implantation, contacts and lines are metallized by again exposing the contacts and lines to a high annealing temperature. Therefore, the densities of the borophosphate-silicate glass and SiO2 existing on the glass can be increased before forming a pattern.
Abstract:
PROBLEM TO BE SOLVED: To provide SiCOH dielectrics and its manufacturing method. SOLUTION: There is provided a useful porous composite material in semiconductor device manufacturing in which the diameter (or the feature size) of a pore and pore size distribution (PSD) are controlled using a nanoscale and which shows an improved cohesive force (or which is the same with improved fracture toughness or improved brittleness) and increase in the power of resistance to the deterioration of the property of wafer such as stress corrosion cracking, Cu invasion, and other important property. The porous composite material is manufactured using at least one bifunctional organic pore source as a precursor compound. COPYRIGHT: (C)2007,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a dielectric material which includes Si, C, O and H atoms and has specific mechanical characteristic (tensile stress, degree of elasticity, hardness, cohesive strength, crack velocity in water) values giving stable ultralow k film which is not deteriorated by steam or integration processing. SOLUTION: This dielectrics materials has an about ≤2.8 dielectric constant, tensile stress of less than 45 Mpas, degree of elasticity of about 2 to about 15 GPas, and hardness of about 0.2 to about 2 GPas. An electronic device structure including the dielectric materials by this invention and various methods by which the dielectrics materials of this invention are manufactured are also disclosed. COPYRIGHT: (C)2005,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To provide a simple damassine manufacturing method for manufacture of a stack capacitor of high aspect surface area suitable for a gigabit DRAM device. SOLUTION: The accumulative charge of a capacitor increases by increasing the accumulative node region. As stack capacitor of high aspect surface area ratio can be manufactured without increasing the maximum cell dimension. The accumulation node is formed by the borophossilicate glass (block 1) in low doped or high doped concentration which is stuck in accurate nanometer dimension by one process stage, and either the doped layer or the nondoped layer is etched (block 3) to have high etching speed. This etching manufactures (block 4) finger-shape shaped protrusions within the nodes, and these protrusion give larger surface region, using a very simplified method where processing stages are limited.