公开(公告)号：US4350976A

公开(公告)日：1982-09-21

申请号：US215134

申请日：1980-12-10

Applicant: Roger Benoit-Gonin ,  Jean L. Berger ,  Jean L. Coutures

Inventor： Roger Benoit-Gonin ,  Jean L. Berger ,  Jean L. Coutures

IPC: H03M1/66 ,  H03M1/00 ,  H03K13/02

CPC classification number: H03M1/00 ,  H03M2201/02 ,  H03M2201/2241 ,  H03M2201/2266 ,  H03M2201/2291 ,  H03M2201/3105 ,  H03M2201/3178 ,  H03M2201/4135 ,  H03M2201/4212 ,  H03M2201/4233 ,  H03M2201/4262 ,  H03M2201/81 ,  H03M2201/8128 ,  H03M2201/814 ,  H03M2201/837

Abstract: Successive two-trip traversals of charges between gates G.sub.0 and G.sub.2 make it possible to obtain beneath gates G.sub.1 and G.sub.2 quantities of charges equal to Q.sub.R, Q.sub.R /2, Q.sub.R /2.sup.2 . . . Q.sub.R /2.sup.i. A readout device for reading charges and connected to gates G.sub.2 and G.sub.4 generates voltages V.sub.R and V.sub.Ri =a.sub.0 .multidot.V.sub.R +a.sub.1 .multidot.V.sub.R /2+ . . . +a.sub.i-1 .multidot.V.sub.R /2.sup.i-1 +V.sub.R /2.sup.i which are compared with a voltage sample V.sub.x to be coded in order to determine by successive approximations the coefficients a.sub.0 . . . a.sub.n which are equal to 0 or to 1 such that V.sub.x =a.sub.0 .multidot.V.sub.R +a.sub.1 .multidot.V.sub.R /2+ . . . +a.sub.n .multidot.V.sub.R /2.sup.n. Depending on the value of a.sub.i, each quantity of charges Q.sub.R /2.sup.i stored beneath gate G.sub.1 is removed beneath diode D.sub.e or stored beneath gate G.sub.3 and then transferred beneath gate G.sub.4.

Abstract translation: 栅极G0和G2之间的电荷的连续两次跳变使得可以获得栅极G1和G2之下的等于QR，QR / 2，QR / 22的电荷量。 。 。 QR / 2i 用于读取电荷并连接到门G2和G4的读出装置产生电压VR和VRi = a0xVR + a1xVR / 2 +。 。 。 + ai-1xVR / 2i-1 + VR / 2i，其与要编码的电压采样Vx进行比较，以便通过逐次逼近来确定系数a0。 。 。 a等于0或1，使得Vx = a0xVR + a1xVR / 2 +。 。 。 + anxVR / 2n。 根据ai的值，存储在栅极G1下方的每个电荷量QR / 2i在二极管De下方被去除或存储在栅极G3下方，然后在栅极G4下方传送。

公开(公告)号：US4626827A

公开(公告)日：1986-12-02

申请号：US475405

申请日：1983-03-15

Applicant: Masatsugu Kitamura ,  Mitsuaki Tanaka ,  Hiroyuki Takekura

Inventor： Masatsugu Kitamura ,  Mitsuaki Tanaka ,  Hiroyuki Takekura

IPC: H03M1/00 ,  H04B14/04 ,  H03K13/02

CPC classification number: H03M1/00 ,  H04B14/046 ,  H03M2201/02 ,  H03M2201/162 ,  H03M2201/196 ,  H03M2201/198 ,  H03M2201/20 ,  H03M2201/3115 ,  H03M2201/4105 ,  H03M2201/4135 ,  H03M2201/4225 ,  H03M2201/4233 ,  H03M2201/4262 ,  H03M2201/531 ,  H03M2201/532 ,  H03M2201/534 ,  H03M2201/535 ,  H03M2201/648 ,  H03M2201/712 ,  H03M2201/715 ,  H03M2201/8128 ,  H03M2201/834

Abstract: A data compression system comprises an analog-to-digital converter for quantizing the analog signal at a first sampling frequency into a series of digital samples and a memory for storing the digital samples. A control circuit generates a sampling datum indicating a variable sampling frequency lower than the first sampling frequency as a function of the instantaneous frequency of the analog signal for selecting digital samples from the memory, reads the selected digital samples out of the memory means in response to the sampling datum, and forms the sampling datum and the selected digital samples into a data set. A series of data sets may be transmitted to a receiving end of the system or stored in a recording medium. The sampling datum is used to indicate the point at which the digital sample is converted to a corresponding analog value.

Abstract translation: 数据压缩系统包括用于将第一采样频率的模拟信号量化成一系列数字样本的模数转换器和用于存储数字样本的存储器。 控制电路根据用于从存储器中选择数字样本的模拟信号的瞬时频率的函数产生指示低于第一采样频率的可变采样频率的采样数据，以响应于从存储器装置读出所选择的数字样本 采样数据，并将采样数据和所选择的数字样本组成数据集。 一系列数据集可以传送到系统的接收端或存储在记录介质中。 采样数据用于指示数字采样转换为相应模拟值的点。

公开(公告)号：KR1020090019277A

公开(公告)日：2009-02-25

申请号：KR1020070083579

申请日：2007-08-20

Applicant: 삼성전자주식회사

Inventor： 이현수

IPC: H03M1/06

CPC classification number: H03M1/129 ,  H03M1/1275 ,  H03M1/18 ,  H03M2201/6142 ,  H03M2201/8128

Abstract: An ADC(Analog and Digital Converter) supplement apparatus is provided to improve the ADC resolution and precisely analyze the signal by setting up the part for dropping the electric pressure between the voltage input portion and the voltage divider. An ADC supplement apparatus comprises a voltage input portion(100), a voltage divider(200), an ADC input unit(300) and a part of dropping electric pressure(400). The ADC supplement apparatus is connected to an ADC(10). The voltage input portion provides the input voltage to ADC. The voltage provided through the voltage input portion controls the voltage divider according to the imputable range of ADC. The ADC input unit supplies the voltage supplied through the voltage divider to ADC. The part of dropping the electric pressure is positioned between the voltage input portion and the voltage divider.

Abstract translation: 提供了一个ADC（模拟和数字转换器）补充装置，以提高ADC分辨率，并通过设置部分来精确地分析信号，以降低电压输入部分和分压器之间的电压。 ADC补充装置包括电压输入部分（100），分压器（200），ADC输入单元（300）和一部分降压电压（400）。 ADC补充装置连接到ADC（10）。 电压输入部分向ADC提供输入电压。 通过电压输入部分提供的电压根据ADC的可计算范围控制分压器。 ADC输入单元通过分压器提供的电压向ADC提供。 降低电压的部分位于电压输入部分和分压器之间。