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公开(公告)号:DE102004036509B4
公开(公告)日:2010-09-09
申请号:DE102004036509
申请日:2004-07-28
Applicant: INFINEON TECHNOLOGIES AG
Inventor: ZUNDEL MARKUS , MEYER THORSTEN
IPC: H01L21/336
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公开(公告)号:DE102008063208A1
公开(公告)日:2009-07-09
申请号:DE102008063208
申请日:2008-12-29
Applicant: INFINEON TECHNOLOGIES AG
Inventor: VON BORCKE MATHIAS , ZUNDEL MARKUS
IPC: H01L23/62
Abstract: A semiconductor device includes a semiconductor substrate having at least a pn-junction arranged in the semiconductor substrate. At least a field electrode is arranged at least next to a portion of the pn-junction, wherein the field electrode is insulated from the semiconductor substrate. A switching device is electrically connected to the field electrode and adapted to apply selectively and dynamically one of a first electrical potential and a second electrical potential, which is different to the first electrical potential, to the field electrode to alter the avalanche breakdown characteristics of the pn-junction.
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公开(公告)号:DE102005014744B4
公开(公告)日:2009-06-18
申请号:DE102005014744
申请日:2005-03-31
Applicant: INFINEON TECHNOLOGIES AG
Inventor: ZUNDEL MARKUS
IPC: H01L29/78 , H01L21/336
Abstract: The transistor has trenches formed inside a semiconductor body and an isolation layer provided adjacent to the body. A gate electrode is provided adjacent to the layer in the trench. A field formed between the trenches has a drift field (D) and a body field with body contact and source fields. A breakthrough is formed in the field for increasing the avalanche rigidity in a depth lying in the area of a trench bottom. An independent claim is also included for a method of manufacturing a trench transistor.
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公开(公告)号:DE102007020248A1
公开(公告)日:2008-11-06
申请号:DE102007020248
申请日:2007-04-30
Applicant: INFINEON TECHNOLOGIES AG
Inventor: ZUNDEL MARKUS
IPC: H01L29/78 , H01L21/336
Abstract: The transistor has double spaced adjacent trenches (12a, 12b) with gate electrodes (10a, 10b) in a substrate (2), where the trenches laterally run in a service area. A recess in the service area comprises an edge trench (12c) laterally limited to the recess. A length of a part of the edge trench is smaller or equal to a length of the double spaced adjacent trenches. The trench comprise a reinforced insulation layer (16c), whose insulation effect is larger than an insulation effect of other insulation layers (22a, 22b) attached to a side of the edge trench facing the recess. Independent claims are also included for the following: (1) a method for manufacturing a vertical power transistor (2) a method for producing a vertical power transistor (3) a method for dimensioning a vertical power transistor.
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公开(公告)号:DE102006002481B3
公开(公告)日:2007-09-06
申请号:DE102006002481
申请日:2006-01-18
Applicant: INFINEON TECHNOLOGIES AG
Inventor: ZUNDEL MARKUS
IPC: H01L23/58 , G01K7/01 , G01K7/16 , H01L21/66 , H01L27/082
Abstract: An integrated circuit having a resistance temperature sensor composed of a first resistance structure formed within a trench, and a second resistance structure formed within a mesa region is disclosed. This embodiment makes it possible to suppress or reduce manufacturing-technological fluctuations of the width of the trenches to a resistance value of the resistance temperature sensor.
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公开(公告)号:DE102005041256A1
公开(公告)日:2007-03-01
申请号:DE102005041256
申请日:2005-08-31
Applicant: INFINEON TECHNOLOGIES AG
Inventor: HIRLER FRANZ , ZUNDEL MARKUS , POELZL MARTIN , ZELSACHER RUDOLF
IPC: H01L29/78 , H01L21/336
Abstract: Embedded in a trench structure (3) and electrically insulated against a semiconductor body (2) by an insulating structure (5), an electrode structure has a gate electrode structure (4 1) and a field electrode structure (4 2) fitted beneath the gate electrode structure and electrically insulated by it. An independent claim is also included for a method for producing a trench transistor.
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公开(公告)号:DE10355588B4
公开(公告)日:2006-06-14
申请号:DE10355588
申请日:2003-11-28
Applicant: INFINEON TECHNOLOGIES AG
Inventor: ZUNDEL MARKUS , ZELSACHER RUDOLF , PERI HERMANN , KOTZ DIETMAR
IPC: H01L29/78 , H01L29/10 , H01L29/40 , H01L29/423 , H01L29/76
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公开(公告)号:DE102004036509A1
公开(公告)日:2006-03-23
申请号:DE102004036509
申请日:2004-07-28
Applicant: INFINEON TECHNOLOGIES AG
Inventor: ZUNDEL MARKUS , MEYER THORSTEN
IPC: H01L21/336
Abstract: The method involves separating a set of trenches (2, 3) by measuring regions. A gate isolation layer (11) that functions partly as a oxidation barrier is provided and a polysilicon layer is deposited on the isolation layer. Top of the polysilicon layer is oxidized and etched. Depth and oxidation of the polysilicon layer are coordinated such that residue polysilicon layer is oxidized in relation to a contacting layer.
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公开(公告)号:DE102004021393A1
公开(公告)日:2005-12-01
申请号:DE102004021393
申请日:2004-04-30
Applicant: INFINEON TECHNOLOGIES AG
Inventor: ZUNDEL MARKUS , KRISCHKE NORBERT
IPC: H01L27/02 , H01L27/108 , H01L29/06 , H01L29/78
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公开(公告)号:DE10343084A1
公开(公告)日:2005-05-04
申请号:DE10343084
申请日:2003-09-17
Applicant: INFINEON TECHNOLOGIES AG
Inventor: ZUNDEL MARKUS , ZELSACHER RUDOLF , PERI HERMANN , KOTZ DIETMAR , KNAPP ACHIM
Abstract: The semiconducting wafer has a number of chips (3) to be separated from each other by isolating frames, each with a cell field (6) in their inner regions and with a chipping stopper in their edge regions (4b). The chipping stopper consists of at least one trench (5a,5b) in which an electrically inactive material is filled and/or in which a cavity is formed. An independent claim is also included for a method of separating a wafer into a number of chips along sawing lines.
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