公开(公告)号：JP2002203846A

公开(公告)日：2002-07-19

申请号：JP2000383735

申请日：2000-12-18

Applicant: UNITED MICROELECTRONICS CORP

Inventor： FAN JUN-SHUN ,  FAMU JUN-MIN ,  CHUN KIN-CHOAN ,  U SHON-CHU

IPC: C23C16/44 ,  H01L21/31

Abstract: PROBLEM TO BE SOLVED: To provide a gas treatment system having an efficient washing and an improved working process. SOLUTION: The joining device 88 of a heating furnace processing gas treatment system joins a semiconductor processing gas discharge conduit with a wet type washing system. The joining device 88 is provided with the first end of a tapering upper part connected to the gas discharge conduit, and a rigid circular casing a second end connected to the wet type washing system. A connector 92 is provided with the second end side wall of the lower end of the casing, and connected to the detachable porous nozzle 96 of the inside of the casing through an L-shaped connection pipe 94. The nozzle 96 is advanced from the connector 92, liquid is sprayed on the inner wall of the casing, mixed with processing gas, and the mixture is converted into a water phase for collection.

公开(公告)号：JP2002170878A

公开(公告)日：2002-06-14

申请号：JP2001041435

申请日：2001-02-19

Applicant: UNITED MICROELECTRONICS CORP

Inventor： SO KASHU ,  RIN KENTEI ,  KO KENCHO

IPC: H01L21/76 ,  H01L21/316

Abstract: PROBLEM TO BE SOLVED: To provide a method for fabricating a shallow trench isolation structure, by which the formation of a recess at the upper corner portion of the shallow trench isolation structure can be effectively prevented by protecting the upper corner portion of the shallow trench isolation structure. SOLUTION: A pad oxide layer and a mask layer are continuously formed on a substrate. A trench is formed by patterning a portion of the pad oxide layer and the mask layer. A liner layer is formed on the exposed face of the substrate including a silicon surface exposed in the trench of the substrate, on the sidewall of the pad oxide layer, and on the sidewall and the surface of the mask layer. A planarization process is carried out until the mask layer is exposed after the trench is filled with oxide layer by depositing over the trench and the substrate. The shallow trench isolation structure is completed by removing the mask layer and the pad oxide layer.

公开(公告)号：JP2002110780A

公开(公告)日：2002-04-12

申请号：JP2000286177

申请日：2000-09-20

Applicant: UNITED MICROELECTRONICS CORP

Inventor： YU SUIYO ,  RO KATETSU ,  YO KOKUJI

IPC: H01L21/76

Abstract: PROBLEM TO BE SOLVED: To provide the manufacturing method of STI which hardly produces defects in silicon substrates. SOLUTION: An oxidation pad layer 102 and a mask layer 104 are formed on the silicon substrate 100, a mask 104a is formed on the mask layer in the pattern of a photoresist formed thereon, and an oxidation pad layer 102a and the substrate 100 are etched, to form a trench. A first isolation layer 112 is formed on the substrate, after an oxidation liner layer 110 has been formed in the trench to partially embed the trench. Since annealing is carried out in this stage and turning into minute structure first isolation film 112 is carried out, stresses due to the difference of a thermal expansion coefficient is opened via a trench opening part. After the trench has been completely embedded by a second isolation layer 116, planarization is carried out, to complete STI.

公开(公告)号：JP2001156287A

公开(公告)日：2001-06-08

申请号：JP33154899

申请日：1999-11-22

Applicant: UNITED MICROELECTRONICS CORP

Inventor： KA SOGI

IPC: H01L29/78 ,  H01L21/28 ,  H01L21/336

Abstract: PROBLEM TO BE SOLVED: To provide a method of manufacturing a silicide structure which is more improved in quality and where a leakage current is prevented from occurring. SOLUTION: A method of manufacturing a silicide structure is that the silicide structure is self-aligned and prevented from increasing in sheet resistance due to a reduction in a wire width by taking advantage of the specific characteristic of cobalt in which cobalt moves downward to react on silicon atoms. Furthermore, the characteristics of silicon atom in which silicon atoms move upward to react on titanium is also utilized. Titanium induces the upward movement of silicon atoms. A titanium layer is used as a barrier layer, by which cobalt acts less on silicon atoms, and a leakage current is prevented. A silicide multilayered structure is kept stable in resistance and capable of preventing a leakage current from occurring.

公开(公告)号：JP2001131783A

公开(公告)日：2001-05-15

申请号：JP30857199

申请日：1999-10-29

Applicant: UNITED MICROELECTRONICS CORP

Inventor： SHO HEICHU ,  RO SORIN ,  SHO ENZAN ,  CHIN SHIKEN ,  CHIN OGI ,  YO SEIGEN ,  CHIN KENHO

IPC: B08B3/08 ,  C23G1/24

Abstract: PROBLEM TO BE SOLVED: To increase effective working time on a work-table while securing sufficient success probability of P.M.(preventive maintenance) by performing cleaning work of deposited matter on a pipe without consuming so much manpower and in such a way that the worker's health is not adversely affected. SOLUTION: This cleaning method for removing deposited matter on a stainless steel pipe with a fluorine-containing neutral solution comprises: (1) a step for providing a vessel into which the fluorine-containing neutral solution is charged; (2) a step for placing plural such stainless steel pipes on each of which the deposited matter exists, in the vessel and immersing the stainless pipes in the fluorine-containing neutral solution; and (3) a step for heating the contents of the vessel, to raise the temperature, to allow the fluorine-containing neutral solution to flow through the space between every adjacent two of the stainless steel pipes and to improve removal efficiency of the deposited matter.

公开(公告)号：JP2001053225A

公开(公告)日：2001-02-23

申请号：JP22179399

申请日：1999-08-04

Applicant: UNITED MICROELECTRONICS CORP

Inventor： SHU JUNBOKU

IPC: H01L21/822 ,  H01L27/04

Abstract: PROBLEM TO BE SOLVED: To manufacture an inductor element on a substrate in which loss is easy to produce, to effectively lower an induced substrate current and to reduce the loss of the substrate by forming depletion regions between the first conductivity injected region and the second conductivity injected region and a lower region along the second conductivity injected region. SOLUTION: A spiral conductive film 14 is formed on the first conductivity substrate 10. The second conductivity injected regions 24 are formed on the substrate 10 and at positions adjacent to a surface. The first conductivity injected region 22 surrounding the second conductivity injected regions 24 and being not brought into contact directly with the second conductivity injected regions 24 at a regular interval to the second conductivity injected regions 24 is formed. The first conductivity injected region 22 and the second conductivity injected regions 24 are connected electrically, and positive bias is applied to the second conductivity injected regions 24. A depletion region 20 is formed between the first conductivity injected region 22 and the second conductivity injected region 24 and in a lower region along the second conductivity injected region 24.

公开(公告)号：JP2001044252A

公开(公告)日：2001-02-16

申请号：JP20952899

申请日：1999-07-23

Applicant: UNITED MICROELECTRONICS CORP

Inventor： RIN CHII-YUN ,  FUWAN JIUN-RUENU

IPC: H01L21/66 ,  G01B3/00 ,  G01B3/30 ,  G01B15/00 ,  G01Q40/00 ,  G01Q60/00 ,  G03F7/00 ,  H01J37/20 ,  H01J37/28

Abstract: PROBLEM TO BE SOLVED: To adjust the micro bar of an electron microscope by forming a vertical side wall around the specific region of a photo resist layer, and determining wavelength with a periodical shape of the vertical side wall according to the wavelength of light and the refractive index of the photo resist layer. SOLUTION: A photo resist layer 22 is formed on the surface of a semiconductor wafer 20, a specific region on the photo resist layer 22 is exposed to light with a far ultraviolet laser beam with short wavelength being generated by krypton fluoride or argon fluoride and is subjected to development, thus forming column structure 26. Then, a vertical side wall 28 with a periodical waveform in a shape similar to a sinusoidal waveform is formed on the side surface of the column structure 26, and the wavelength of the periodical shape of the vertical side wall 28 is determined by the refractive index between a light wave and the photo resist layer 22, thus adjusting the micro bar of an electron microscope.

公开(公告)号：JP2001044160A

公开(公告)日：2001-02-16

申请号：JP19966899

申请日：1999-07-13

Applicant: UNITED MICROELECTRONICS CORP

Inventor： CHIN TOIKU ,  RYU SHIKEN ,  SHO KENTATSU ,  YO KENRIN

IPC: B08B3/12 ,  B08B7/00 ,  G03F7/42 ,  H01L21/027 ,  H01L21/304 ,  H01L21/306

Abstract: PROBLEM TO BE SOLVED: To provide a method for cleaning the surface of a low dielectric constant material. SOLUTION: A substantially large part of a photoresist layer on a low dielectric constant organic material layer 102 is removed by a plasma108 containing nitrogen atoms, and thereafter an oxynitride silicon layer is formed on an exposed surface of the organic material layer. A resilient photoresist layer 106a of a plasma process is made to swell in a solvent 112. Then an oxygen plasma 114 is used to remove the swelled resilient photoresist layer. When the laminate is cleaned with the oxygen plasma, an oxynitride thin film 110 is formed on the organic material layer. Through the protection of the oxygennitride silicon layer, distortion of a cross-sectional shape of the organic material layer is prevented.

公开(公告)号：JP2001036058A

公开(公告)日：2001-02-09

申请号：JP19767799

申请日：1999-07-12

Applicant: UNITED MICROELECTRONICS CORP

Inventor： HAN ZUISHO ,  RI JIKA

IPC: H01L31/10 ,  H01L27/146

Abstract: PROBLEM TO BE SOLVED: To obtain a manufacture for a MOS sensor having improved sensitivity. SOLUTION: A P-type region 104 extending into a substrate 100 is formed. A laminated polysilicon structure 115 is formed on the P-type region 104. Next, the laminated polysilicon structure 115 is used as an implantation buffer layer, and ions are implanted into the P-type region to form an N-type region 120 extended to the substrate at a shallow depth. The laminated polysilicon structure 115 is patterned and etched to form a laminated polysilicon ring 122, exposing partially the N-type region 120 on the P-type region. A metal wiring 130 for electrically connecting the laminated polysilicon ring structure with a MOS transistor gate is formed.

公开(公告)号：JP2000330258A

公开(公告)日：2000-11-30

申请号：JP13983099

申请日：1999-05-20

Applicant: UNITED MICROELECTRONICS CORP

Inventor： RIN KINRYU

IPC: H01L21/027 ,  G03F1/36 ,  G03F1/68 ,  G03F1/08

Abstract: PROBLEM TO BE SOLVED: To obtain a method for correcting optical proximity. SOLUTION: Main patterns 300 having critical dimensions are supplied. When the critical dimensions are a first reference value or below the value, serifs 304 (projecting patterns for correction)/hammer heads (hammer-like patterns for correction) are added to the main patterns 300. When the critical dimensions are a second reference value smaller than the first reference value or below the value, auxiliary patterns 302 are added to the main patterns 300. The corrected patterns are transferred onto the layer on a wafer with high fidelity.