中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

393 records (took 0.028 seconds)

    MULTILAYER SUBSTRATE
    141.
    发明申请
    MULTILAYER SUBSTRATE 有权
    多层基板

    公开(公告)号：US20110079422A1

    公开(公告)日：2011-04-07

    申请号：US12994774

    申请日：2008-05-26

    Applicant: Taras Kushita ,  Jun Sakai ,  Hikaru Kouta

    Inventor： Taras Kushita ,  Jun Sakai ,  Hikaru Kouta

    IPC: H05K1/11

    CPC classification number: H05K1/0245 ,  H05K1/0251 ,  H05K1/116 ,  H05K3/429 ,  H05K2201/09309 ,  H05K2201/09636 ,  H05K2201/09718

    Abstract: A multilayer substrate is provided with a conductor plane region in which a plurality of conductor planes are disposed; a clearance region disposed adjacent to the conductor plane region so that the plurality of conductor planes are excluded from the clearance region. A plurality of signal vias are disposed through the clearance region so that the plurality of signal vias are isolated from the plurality of conductor planes. A conductor post is connected to one of the plurality of conductor planes and disposed between two of the signal vias in the clearance region.

    Abstract translation: 多层基板设置有布置有多个导体平面的导体平面区域; 与所述导体平面区域相邻设置的间隙区域，以使所述多个导体平面从所述间隙区域排除。 多个信号通孔设置穿过间隙区域，使得多个信号通孔与多个导体平面隔离。 导体柱连接到多个导体平面中的一个并且设置在间隙区域中的两个信号通孔之间。

    SUBSTRATES, SYSTEMS, AND DEVICES INCLUDING STRUCTURES FOR SUPPRESSING POWER AND GROUND PLANE NOISE, AND METHODS FOR SUPPRESSING POWER AND GROUND PLANE NOISE
    144.
    发明申请
    SUBSTRATES, SYSTEMS, AND DEVICES INCLUDING STRUCTURES FOR SUPPRESSING POWER AND GROUND PLANE NOISE, AND METHODS FOR SUPPRESSING POWER AND GROUND PLANE NOISE 有权
    基板，系统和装置，包括用于抑制电力和接地平面噪声的结构，以及用于抑制电力和接地平面噪声的方法

    公开(公告)号：US20100284134A1

    公开(公告)日：2010-11-11

    申请号：US12842637

    申请日：2010-07-23

    Applicant: Houfei Chen ,  Shiyou Zhao

    Inventor： Houfei Chen ,  Shiyou Zhao

    IPC: G06F1/16 ,  H05K1/00 ,  H05K1/16 ,  H05K7/00 ,  H05K1/11

    CPC classification number: H05K1/0216 ,  G11C5/04 ,  G11C5/063 ,  H05K1/0298 ,  H05K1/162 ,  H05K2201/09309 ,  H05K2201/09636 ,  H05K2201/09981 ,  H05K2203/0733 ,  Y10T29/4913 ,  Y10T29/49155

    Abstract: Substrates having power and ground planes, such as, for example, printed circuit boards, include at least one noise suppression structure configured to suppress electrical waves propagating through at least one of a power plane and a ground plane. The at least one noise suppression structure may include a power plane extension that extends from the power plane generally toward the ground plane, and a ground plane extension that extends from the ground plane generally toward the power plane. The ground plane extension may be separated from the power plane extension by a distance that is less than the distance separating the power and ground planes. Electronic device assemblies and systems include such substrates. Methods for suppressing noise in at least one of a power plane and a ground plane include providing such noise suppression structures between power and ground planes.

    Abstract translation: 具有电源和接地层的衬底，例如印刷电路板，包括至少一个噪声抑制结构，其被配置为抑制通过电力平面和接地平面中的至少一个传播的电波。 所述至少一个噪声抑制结构可以包括从所述功率平面大致朝向所述接地平面延伸的电力平面延伸部，以及从所述接地平面大致向所述电力平面延伸的接地平面延伸部。 接地平面延伸部可以与动力平面延伸部分离距离小于分离动力和接地平面的距离。 电子器件组件和系统包括这样的衬底。 用于抑制电力平面和接地平面中的至少一个中的噪声的方法包括在电源和接地层之间提供这种噪声抑制结构。

    FILTER
    145.
    发明申请
    FILTER 有权
    过滤

    公开(公告)号：US20100214039A1

    公开(公告)日：2010-08-26

    申请号：US12704529

    申请日：2010-02-12

    Applicant: Pei-Yang Lin ,  Chih-Chung Lin ,  Wen-Lin Yang

    Inventor： Pei-Yang Lin ,  Chih-Chung Lin ,  Wen-Lin Yang

    IPC: H01P1/203

    CPC classification number: H01P1/20345 ,  H05K1/0216 ,  H05K1/0245 ,  H05K1/0251 ,  H05K3/429 ,  H05K2201/09636 ,  H05K2201/09781

    Abstract: A filter for filtering noise generated by a differential signal having a specific wavelength transmitted by a first transmission line and a second transmission line is disclosed. The filter includes a multi-layer substrate, a first microstrip line and a second microstrip line. The first and the second transmission lines and the first and the second microstrip lines are disposed at the multi-layer substrate. In addition, one end of the first microstrip line and one end of the second microstrip line are electrically connected to the first and the second transmission lines, respectively, by passing through the vias, and the other end is in a floating state. The impedances of the first and the second microstrip lines match the impedances of the first and the second transmission lines, respectively. Thus, the first and the second microstrip lines may filter the noise generated by the differential signal having the specific wavelength.

    Abstract translation: 公开了一种用于滤波由具有由第一传输线和第二传输线传输的特定波长的差分信号产生的噪声。 滤波器包括多层基板，第一微带线和第二微带线。 第一和第二传输线以及第一和第二微带线设置在多层基板上。 此外，第一微带线的一端和第二微带线的一端分别通过穿过通孔而电连接到第一和第二传输线，另一端处于浮置状态。 第一和第二微带线的阻抗分别匹配第一和第二传输线的阻抗。 因此，第一和第二微带线可以滤除由具有特定波长的差分信号产生的噪声。

    Compact differential signal via structure
    146.
    发明授权
    Compact differential signal via structure 有权
    紧凑型差分信号通孔结构

    公开(公告)号：US07705246B1

    公开(公告)日：2010-04-27

    申请号：US11965811

    申请日：2007-12-28

    Applicant: Jason Pritchard ,  Michael Gnieski

    Inventor： Jason Pritchard ,  Michael Gnieski

    IPC: H01R12/04 ,  H05K1/11

    CPC classification number: H05K1/0245 ,  H05K1/0222 ,  H05K3/429 ,  H05K2201/09236 ,  H05K2201/09636 ,  H05K2201/09718

    Abstract: A differential signal via structure for a printed circuit board having a pair of signal vias extending vertically from a surface of the board to an interior region of the board to contact signal conductors disposed horizontally within the interior region of the board and a pair of ground vias extending vertically from a surface of the circuit board to an interior region of the board to contact ground conductors disposed horizontally within the interior region of the board.

    Abstract translation: 一种用于印刷电路板的差分信号通孔结构，其具有从板的表面垂直延伸到板的内部区域的一对信号通孔，以接触水平放置在板的内部区域内的信号导体和一对接地通孔 从电路板的表面垂直延伸到板的内部区域以接触水平地布置在板的内部区域内的接地导体。

    Integrated Circuit Package for High-Speed Signals
    148.
    发明申请
    Integrated Circuit Package for High-Speed Signals 有权
    用于高速信号的集成电路封装

    公开(公告)号：US20090152689A1

    公开(公告)日：2009-06-18

    申请号：US12060387

    申请日：2008-04-01

    Applicant: Ellis E. Nease ,  Ashley Rebelo ,  Christopher J. Wittensoldner

    Inventor： Ellis E. Nease ,  Ashley Rebelo ,  Christopher J. Wittensoldner

    IPC: H01L23/50

    CPC classification number: H05K1/0251 ,  H01L23/49827 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2223/6638 ,  H01L2924/0002 ,  H01L2924/19051 ,  H01L2924/3011 ,  H05K1/0245 ,  H05K1/115 ,  H05K2201/09236 ,  H05K2201/09627 ,  H05K2201/09636 ,  H05K2201/09727 ,  H01L2924/00

    Abstract: An integrated circuit package having a multi-segment transmission line transformer for impedance matching a packaged integrated circuit, such as a driver or receiver, to a printed circuit board (PCB) transmission line to which the packaged chip is attached by, for example, solder balls. In one exemplary embodiment, a three-segment transmission line transformer provides improved broadband performance with the advantage of having a middle segment with a flexible length for easier routing. The length of each end segment of the three-segment transformer is adjusted to provide at least partial cancellation of reflections between the PCB and the transformer, and between the transformer and a circuit on the integrated circuit, respectively. Further, the inductive reactance of the solder balls and via wiring may be cancelled out by the transformed chip impedance to provide a non-inductive termination to the PCB transmission line at approximately one-half the highest data rate of the channel.

    Abstract translation: 一种具有多段传输线变压器的集成电路封装，用于将封装集成电路（例如驱动器或接收器）与包装芯片通过例如焊料连接到的印刷电路板（PCB）传输线进行阻抗匹配 球。 在一个示例性实施例中，三段式传输线变压器提供了改进的宽带性能，其优点在于具有具有灵活长度的中间段以便于路由。 三段式变压器的每个端段的长度被调整以分别提供PCB和变压器之间以及变压器与集成电路上的电路之间的反射的至少部分消除。 此外，焊球和通孔布线的感抗可能被转换的芯片阻抗抵消，以便以通道的最高数据速率的大约一半提供对PCB传输线的非感性端接。

    High-speed router with backplane using tuned-impedance thru-holes and vias
    149.
    发明申请
    High-speed router with backplane using tuned-impedance thru-holes and vias 审中-公开

    公开(公告)号：US20080285248A1

    公开(公告)日：2008-11-20

    申请号：US12011298

    申请日：2008-01-25

    Applicant: Joel R. Goergen

    Inventor： Joel R. Goergen

    IPC: H01R12/18

    CPC classification number: H05K1/0251 ,  H05K1/0245 ,  H05K1/116 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09454 ,  H05K2201/09636 ,  H05K2201/09781

    Abstract: A high-speed router backplane is disclosed. The router backplane uses differential signal pairs on multiple signal layers, each sandwiched between a pair of digital ground layers. To reduce routing complexity, at least some of the differential signal pairs route through a via pair, somewhere along their path, to a different signal layer. Specific via designs reduce differential signal distortion due to the via pair, allowing the backplane to operate reliably at differential signal rates in excess of 3 Gigabits per second. In particular, each via passes through nonfunctional conductive pads on selected digital ground plane layers, the pads separated from the remainder of its ground plane layer by a clearance, thereby modifying the impedance of the via and reducing reflections from the stubs created by the via.

Patent Agency Ranking