公开(公告)号：JP3547731B2

公开(公告)日：2004-07-28

申请号：JP2002053941

申请日：2002-02-28

Applicant: テッセラ・インコーポレーテッドTessera,Inc.

Inventor： エーレンバーグ、スコット、ジー． ,  カンドロス、イゴール ,  グルーベ、ゲイリー、ダブリュ． ,  ディステファーノ、トーマス、エイチ．

IPC: H05K1/11 ,  H01L21/48 ,  H01L23/538 ,  H05K1/00 ,  H05K3/00 ,  H05K3/40 ,  H05K3/46

CPC classification number: H05K3/462 ,  H01L21/4857 ,  H01L23/5383 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01R12/523 ,  H05K1/0287 ,  H05K1/029 ,  H05K1/0298 ,  H05K3/4038 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/4623 ,  H05K2201/0195 ,  H05K2201/0305 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/09609 ,  H05K2201/09945 ,  H05K2201/10378 ,  H05K2201/10666 ,  H05K2203/175 ,  H01L2924/00

公开(公告)号：JP2004521507A

公开(公告)日：2004-07-15

申请号：JP2002582674

申请日：2002-04-11

Applicant: ミクロヴィタエ テクノロジーMicrovitae Technologies

Inventor： ティエリー エルヴェ

IPC: H05K1/11 ,  A61B5/0408 ,  H05K3/32 ,  H05K3/36

CPC classification number: H05K3/363 ,  A61B5/04085 ,  A61B2562/222 ,  H05K1/118 ,  H05K3/321 ,  H05K3/361 ,  H05K2201/053 ,  H05K2201/09472 ,  H05K2201/10477 ,  H05K2201/10666 ,  H05K2203/0455

Abstract: 【課題】本発明は、生理的活動を測定または刺激するための電極（４）を備える構造体（１）の第１の接触スタッド（１６）を、少なくとも下流回路（２）の第２のスタッド（１７）に接続する方法に関する。
【解決手段】各第２のスタッド（１７）は、下流回路を穿孔する開口部（１５）により貫かれている。 本方法は、ａ）下流回路を構造体の上に置き、第２のスタッド（１７）の開口部（１５）が第１のスタッド（１６）の反対側に位置するようにするステップと、ｂ）第２のスタッド（１７）の開口部（１５）に、反対側にある第１のスタッドおよび第２のスタッドの間の接続を提供する導電材料（１８）を堆積させるステップとを有する。
【選択図】図３Ａ

公开(公告)号：JP3527229B2

公开(公告)日：2004-05-17

申请号：JP2002144526

申请日：2002-05-20

Applicant: 沖電気工業株式会社

Inventor： 高 野口

IPC: H01L23/12 ,  H01L21/60 ,  H01L23/498 ,  H01L23/58 ,  H05K3/22 ,  H05K3/34 ,  H05K3/42

CPC classification number: H01L22/32 ,  H01L23/498 ,  H01L23/49805 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/49109 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/3651 ,  H05K3/225 ,  H05K3/3436 ,  H05K3/429 ,  H05K2201/0394 ,  H05K2201/0959 ,  H05K2201/0969 ,  H05K2201/09736 ,  H05K2201/10666 ,  H05K2203/0195 ,  Y02P70/613 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

公开(公告)号：JPS59175798A

公开(公告)日：1984-10-04

申请号：JP1453684

申请日：1984-01-31

Applicant: Inf Milit Spatiale Aeronaut

Inventor： JIYATSUKU SERUBORU ,  KUROODO TONERA

IPC: H05K3/28 ,  H05K1/00 ,  H05K1/14 ,  H05K3/00 ,  H05K3/22 ,  H05K3/30 ,  H05K3/34 ,  H05K3/36 ,  H05K3/38 ,  H05K3/46

CPC classification number: H05K3/363 ,  H05K1/0393 ,  H05K1/141 ,  H05K3/0058 ,  H05K3/225 ,  H05K3/305 ,  H05K3/3447 ,  H05K3/386 ,  H05K2201/096 ,  H05K2201/09845 ,  H05K2201/10666 ,  H05K2201/10977 ,  H05K2203/066

公开(公告)号：US08350162B2

公开(公告)日：2013-01-08

申请号：US12659556

申请日：2010-03-12

Applicant: Hyun Tae Kim ,  Tae Sang Park ,  Young Jun Moon ,  Soon Min Hong ,  Hyo Young Shin

Inventor： Hyun Tae Kim ,  Tae Sang Park ,  Young Jun Moon ,  Soon Min Hong ,  Hyo Young Shin

IPC: H05K1/11

CPC classification number: H05K3/363 ,  H05K3/3457 ,  H05K3/3494 ,  H05K2201/09709 ,  H05K2201/10666 ,  H05K2203/0195 ,  H05K2203/167 ,  Y10T29/49126 ,  Y10T29/49213

Abstract: Disclosed is a connection structure for a circuit board using a solder bump to arrange circuit boards. The circuit board connection structure includes a solder bump prepared on one of two circuit boards and a perforated part formed at the other of the circuit boards to receive the solder bump. Facing both circuit boards towards each other and inserting the solder bump into the perforated part, the circuit boards are desirably arranged.

Abstract translation: 公开了一种使用焊料凸块布置电路板的电路板的连接结构。 电路板连接结构包括制备在两个电路板中的一个上的焊料凸块和形成在另一个电路板上的穿孔部分以接收焊料凸块。 将两个电路板朝向彼此并将焊料凸块插入穿孔部分中，期望布置电路板。

公开(公告)号：US08143709B2

公开(公告)日：2012-03-27

申请号：US12474429

申请日：2009-05-29

Applicant: Hye-Jin Kim

Inventor： Hye-Jin Kim

IPC: H01L23/02

CPC classification number: H01L23/49816 ,  H01L23/3128 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H05K3/3436 ,  H05K2201/09572 ,  H05K2201/10666 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package having a solder ball having a double connection structure which reduces a total height of a package on package (POP). The semiconductor package includes a first semiconductor package in which a semiconductor device is mounted on a lower surface of a first substrate, and a through hole is formed in a solder ball pad region of the first substrate, a second semiconductor package in which a semiconductor device is mounted on an upper surface of a second substrate, and a solder ball pad of the second substrate is formed to correspond to the through hole of the first substrate and is mounted on the first substrate, and a common solder ball that is disposed below the first substrate and is connected to the solder ball pad of the second substrate through the through hole.

Abstract translation: 一种具有双重连接结构的焊球的半导体封装，其减少了封装（POP）上的封装的总高度。 半导体封装包括第一半导体封装，其中半导体器件安装在第一衬底的下表面上，并且通孔形成在第一衬底的焊球焊盘区域中;第二半导体封装，其中半导体器件 安装在第二基板的上表面上，并且形成第二基板的焊球垫，以对应于第一基板的通孔，并且安装在第一基板上，并且配置公共焊球， 并且通过通孔与第二基板的焊球焊盘连接。

公开(公告)号：US20110278725A1

公开(公告)日：2011-11-17

申请号：US13192683

申请日：2011-07-28

Applicant: Cheng-Lien CHIANG

Inventor： Cheng-Lien CHIANG

IPC: H01L23/498 ,  H01L21/768

CPC classification number: H01L23/13 ,  H01L23/3107 ,  H01L23/4951 ,  H01L23/49811 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/16 ,  H01L2224/4826 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/15331 ,  H05K1/144 ,  H05K1/181 ,  H05K3/244 ,  H05K3/368 ,  H05K2201/09036 ,  H05K2201/096 ,  H05K2201/09609 ,  H05K2201/10234 ,  H05K2201/10515 ,  H05K2201/10666 ,  H05K2203/041 ,  H05K2203/0455 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An interconnection mechanism between plated through holes is disclosed, a first embodiment includes a first substrate having a first plated through hole; a second substrate having a second plated through hole; a metal core is configured in between the two plated through holes; the metal ball has a diameter larger than a diameter of the plated through holes; and melted solder binds the first plated through hole, metal core, and the second plated through hole. A second embodiment includes stacked substrate having a gold plated only on ring pads of the plated through holes; melted solder binds the two gold ring pads.

Abstract translation: 公开了电镀通孔之间的互连机构，第一实施例包括具有第一电镀通孔的第一基板; 具有第二电镀通孔的第二基板; 金属芯构造在两个电镀通孔之间; 金属球的直径大于电镀通孔的直径; 并且熔化的焊料结合第一电镀通孔，金属芯和第二电镀通孔。 第二实施例包括具有仅在电镀通孔的环形垫上镀金的堆叠衬底; 熔化的焊料结合两个金环垫。

公开(公告)号：US08030574B2

公开(公告)日：2011-10-04

申请号：US12150265

申请日：2008-04-25

Applicant: Wen-Bin Lin ,  Chih-Hung Chang

Inventor： Wen-Bin Lin ,  Chih-Hung Chang

IPC: H05K1/00

CPC classification number: H05K1/118 ,  H05K1/028 ,  H05K1/117 ,  H05K3/363 ,  H05K2201/0949 ,  H05K2201/10666 ,  H05K2203/0191 ,  H05K2203/1572

Abstract: A flexible printed circuit includes a flexible substrate, a plurality of first conductive wires, and a plurality of second conductive wires. The flexible substrate includes a first surface and a second surface facing the first surface. The first conductive wires are provided on the first surface. The first conductive wires extend from an edge of the flexible substrate to another edge of the flexible substrate. The second conductive wires are provided on the second surface. The second conductive wires extend from an end of the flexible substrate to a predetermined portion of the flexible substrate. A part of each second conductive wire at the predetermined portion of the flexible substrate is electrically connected with the first conductive wire via a conductive structure.

Abstract translation: 柔性印刷电路包括柔性基板，多个第一导电线和多个第二导线。 柔性基板包括第一表面和面向第一表面的第二表面。 第一导电线设置在第一表面上。 第一导线从柔性基板的边缘延伸到柔性基板的另一边缘。 第二导线设置在第二表面上。 第二导线从柔性基板的端部延伸到柔性基板的预定部分。 在柔性基板的预定部分处的每个第二导线的一部分经由导电结构与第一导线电连接。

公开(公告)号：US08015703B2

公开(公告)日：2011-09-13

申请号：US12081835

申请日：2008-04-22

Applicant: Hitoki Kanagawa ,  Tetsuya Ohsawa ,  Yasunari Ooyabu

Inventor： Hitoki Kanagawa ,  Tetsuya Ohsawa ,  Yasunari Ooyabu

IPC: H01R9/00 ,  H05K3/00

CPC classification number: H05K1/112 ,  G11B5/4833 ,  H01L2224/11003 ,  H01L2224/742 ,  H05K1/056 ,  H05K3/06 ,  H05K3/244 ,  H05K3/28 ,  H05K3/363 ,  H05K3/44 ,  H05K2201/0394 ,  H05K2201/09063 ,  H05K2201/0969 ,  H05K2201/10666 ,  H05K2203/0323 ,  H05K2203/041 ,  H05K2203/0455 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49204

Abstract: A method of manufacturing a wired circuit board including a metal supporting board. An insulating layer is formed on the metal supporting board in a pattern in which concave portions are formed. A conductive pattern in a pattern having terminals for connecting with external terminals via a molten metal is formed on the metal supporting board and the insulating layer. The terminals include shoulder portions corresponding to the concave portions and are concaved downward from an upper surface. First through holes penetrate the terminals in a thickness direction thereof Second through holes are formed communicating with the first through holes in portions of the insulating layer corresponding to the terminals by removing the concave portions to expose a lower surface of the terminals such that the second through holes penetrate the insulating layer in a thickness direction thereof and have a diameter larger than that of the first through holes.

Abstract translation: 一种制造包括金属支撑板的布线电路板的方法。 绝缘层以形成有凹部的图案形成在金属支撑板上。 在金属支撑板和绝缘层上形成具有用于经由熔融金属与外部端子连接的端子的图案中的导体图案。 端子包括对应于凹部的肩部，并且从上表面向下凹入。 第一通孔在厚度方向上贯穿端子。通过除去凹部以露出端子的下表面，在绝缘层的与端子对应的部分中的第一通孔形成第二通孔，以使第二通孔 孔的厚度方向穿过绝缘层，其直径大于第一通孔的直径。

公开(公告)号：US07944710B2

公开(公告)日：2011-05-17

申请号：US12528443

申请日：2008-10-06

Applicant: Victor Marten ,  Aakar Patel ,  Mark Vanstone

Inventor： Victor Marten ,  Aakar Patel ,  Mark Vanstone

IPC: H05K1/11

CPC classification number: H05K3/363 ,  H05K1/165 ,  H05K3/3447 ,  H05K3/368 ,  H05K2201/096 ,  H05K2201/10303 ,  H05K2201/10666 ,  H05K2201/10871 ,  Y10T29/49126 ,  Y10T29/49153 ,  Y10T29/49165

Abstract: The disclosure involves the efficient termination of a winding PCB of a planar inductive component to a main PCB, using relatively little space and providing a low-resistance connection. The disclosed methods are especially suitable for planar structures where several winding PCBs, and/or winding PCBs and a main PCB, are all enclosed by the magnetic path components. The methods allow for a winding PCB to simply rest on the main PCB, or other winding PCBs, without any clearance. The disclosure employs mating sets of conductive annular rings with an optional interlocking terminal pin that allows two PCBs to be fixedly coupled together, while preserving a minimum distance between the solder-mask layers of the two PCBs in order to prevent the formation of unwanted electrical connections between the two PCBs. Solder is used to ensure effective coupling in each assembly of mating annular rings and optional terminal pin.

Abstract translation: 本公开涉及使用相对较小的空间并提供低电阻连接将平面感应元件的绕组PCB有效地端接到主PCB。 所公开的方法特别适用于其中几个绕组PCB，和/或绕组PCB和主PCB都由磁路部件封闭的平面结构。 这些方法允许绕组PCB简单地搁置在主PCB或其他绕组PCB上，没有任何间隙。 本公开采用配套的导电环形环，其具有可选的互锁端子销，其允许两个PCB固定地耦合在一起，同时保持两个PCB的焊接掩模层之间的最小距离，以防止形成不需要的电连接 在两个PCB之间。 焊接用于确保配合环形圈和可选端子销的每个组件中的有效耦合。