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    CIRCUIT BOARD
    171.
    发明公开
    CIRCUIT BOARD 审中-公开
    电路板

    公开(公告)号：EP2520141A2

    公开(公告)日：2012-11-07

    申请号：EP10787534.6

    申请日：2010-11-23

    Applicant: BAE Systems Plc.

    Inventor： NIMAN, Murray Jerel

    IPC: H05K3/46

    CPC classification number: H05K1/116 ,  H05K1/0219 ,  H05K1/0251 ,  H05K2201/015 ,  H05K2201/0352 ,  H05K2201/09618 ,  H05K2201/09718 ,  Y10T29/49124

    Abstract: A multilayer circuit board, comprising: a plurality of printed circuit board layers arranged stacked together; and a conductively plated via; a surface of a through which the via passes comprises a conducting region surrounding a non-conducting region that is substantially centred around a point where the via intersects the surface; a smallest width dimension, e.g. diameter of the non-conducting region is greater than or equal to 4 times the diameter of the via; the via connects a conductive contact pad on one printed circuit board layer to a conductive contact pad on another printed circuit board layer, with the printed circuit board with the non-conducting region lying between the two connected layers; and the largest width dimension of the conductive contact pads on the surfaces of the printed circuit board layers connected by the via are less than the smallest width dimension of the non-conducting region.

    Abstract translation: 一种多层电路板，包括：多个布置在一起的印刷电路板层; 和导电镀通孔; 所述通孔穿过的表面包括围绕非导电区域的导电区域，所述导电区域基本上以所述通孔与所述表面相交的点为中心; 最小的宽度尺寸，例如 非导电区域的直径大于或等于通孔直径的4倍; 所述通孔将一个印刷电路板层上的导电接触垫连接到另一个印刷电路板层上的导电接触垫，其中所述印刷电路板的非导电区域位于所述两个连接层之间; 并且由通孔连接的印刷电路板层的表面上的导电接触垫的最大宽度尺寸小于非导电区域的最小宽度尺寸。

    LED-Kontaktierung
    173.
    发明公开
    LED-Kontaktierung 审中-公开

    公开(公告)号：EP2037723A3

    公开(公告)日：2010-12-29

    申请号：EP08164448.6

    申请日：2008-09-16

    Applicant: TridonicAtco Deutschland GmbH

    Inventor： Schubert, Gisbert

    IPC: H05K3/32

    CPC classification number: H05K3/326 ,  F21K9/00 ,  F21Y2115/10 ,  H01R4/2487 ,  H01R25/147 ,  H05K3/308 ,  H05K3/4046 ,  H05K2201/09309 ,  H05K2201/09718 ,  H05K2201/10106 ,  H05K2201/10409

    Abstract: Eine Basisplatte (21) für ein Leuchtelement (26) insbesondere für die Lichtwerbung weist
    - eine erste leitfähige Schicht (23) mit einer ersten Öffnung (32) und eine zweite leitfähige Schicht (24) mit einer zweiten Öffnung (33), und
    - eine Isolierschicht (22) zwischen der ersten und der zweiten leitfähigen Schicht (23, 24) auf,

    wobei ein erstes Befestigungselement (40) durch die erste Öffnung (32) bzw. ein zweites Befestigungselement (41) durch die zweite Öffnung (33) in die Basisplatte (21) derart einfügbar sind, dass das erste Befestigungselement (40) nur an die zweite leitfähige Schicht (24) bzw. das zweite Befestigungselement (41) nur an die erste leitfähige Schicht (24) elektrisch anschließbar sind.

    Abstract translation: 板（21）具有带有开口（33）的导电层（23）和具有另一开口的另一导电层（24）。 绝缘层（22）设置在导电层之间，绝缘层是塑料板。 两个紧固元件（40,41）穿过相应的开口插入，使得紧固元件（40）电连接到导电层（24）和/或电连接到导电层的紧固元件（41） （23）。 导电层由铝构成。 对于照明广告，还包括用于照明的照明信件的独立权利要求。

    Printed wiring board
    174.
    发明公开
    Printed wiring board 审中-公开
    印刷线路板

    公开(公告)号：EP1983809A3

    公开(公告)日：2010-07-21

    申请号：EP08007057.6

    申请日：2008-04-09

    Applicant: YAZAKI CORPORATION

    Inventor： Masaoki, Yoshida ,  Nakayama, Takuya ,  Ueyama, Koji

    IPC: H05K1/11

    CPC classification number: H05K1/116 ,  H05K1/0256 ,  H05K3/3447 ,  H05K2201/09363 ,  H05K2201/09463 ,  H05K2201/0969 ,  H05K2201/09718 ,  H05K2201/10651 ,  H05K2203/1446

    Abstract: The present invention is to provide a printed wiring board which can certainly prevent damage of conductive pattern caused by the terminal. The printed wiring board has a board, a conductive pattern, a through-hole and a non-conductive area. A lead wire of resistance mounted on the printed wiring board is inserted into the through-hole 4. The lead wire projects from a surface of the board, and is bent close to the surface. The non-conductive area is formed into a fan-shaped shape enlarging toward a tip of the lead wire from a center of the through-hole. Since the bent lead wire is arranged on the non-conductive area, the non-conductive area can prevent damage of the conductive pattern which is caused by touching the lead wire to the conductive pattern.

    Abstract translation: 本发明提供一种能够可靠地防止由端子引起的导体图案的损伤的印刷布线板。 印刷线路板具有板，导电图案，通孔和非导电区域。 将安装在印刷线路板上的电阻引线插入到通孔4中。引线从电路板的表面突出，并弯曲靠近表面。 非导电区域形成为从通孔的中心向引线的末端扩大的扇形形状。 由于弯曲引线布置在非导电区域上，因此非导电区域可以防止由于引线接触导电图案而导致的导电图案的损坏。

    Plated vias exit structure for printed circuit board
    176.
    发明公开
    Plated vias exit structure for printed circuit board 审中-公开
    AustrittsstrukturfürDurchkontaktierungslöchereiner Leiterplatte

    公开(公告)号：EP1841298A3

    公开(公告)日：2008-05-07

    申请号：EP07110136.4

    申请日：2005-02-14

    Applicant: MOLEX INCORPORATED

    Inventor： Regnier, Kent, E. ,  Brunker, David, L. ,  Ogbuokiri, Martin, U.

    IPC: H05K1/11 ,  H05K1/02 ,  H01L23/64 ,  H01L23/66 ,  H01R24/00 ,  H01R12/16

    CPC classification number: H05K1/0251 ,  H01L2223/6627 ,  H01L2924/0002 ,  H01L2924/1903 ,  H05K1/0222 ,  H05K1/0245 ,  H05K1/115 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09609 ,  H05K2201/09636 ,  H05K2201/09718 ,  H05K2201/10189 ,  H01L2924/00

    Abstract: A circuit board (600) design is disclosed that is useful in high speed differential signal applications uses a circuit trace exit structure (620) and optionally a via arrangement. The circuit trace exit structure involves the exit portions (620) of the circuit traces (550) of the differential signal vias (609) to follow a path where the traces then meet with and join to the transmission line portions (552,612) of the conductive traces (550). In the via arrangement, sets of differential signal pair vias (551,609) and an associated ground (593a) are arranged adjacent to each other in a repeating pattern. The differential signal vias of each pair (591) are spaced closer to their associated ground via (593a) than the spacing between the adjacent differential signal pair associated ground (593b) so that differential signal vias exhibit a preference for electrically coupling to their associated ground vias.

    Abstract translation: 公开了一种在高速差分信号应用中使用电路走线出口结构（620）和可选的通孔装置的电路板（600）设计。 电路走线出口结构涉及差分信号通孔（609）的电路迹线（550）的出口部分（620），以跟随路径，其中迹线然后与导体的传输线部分（552,612）相接并连接 痕迹（550）。 在通孔布置中，差分信号对通孔（551,609）和相关联的接地（593a）的组以重复图案彼此相邻布置。 每对（591）的差分信号通孔（593a）比相邻的差分信号对相关联的接地（593b）之间的间隔更靠近其相关联的接地，使得差分信号通孔表现出对它们的相关接地电耦合的偏好 孔。

    Wiring board with built-in capacitor
    177.
    发明公开
    Wiring board with built-in capacitor 审中-公开
    Leiterplatte mit eingebautem矫正器

    公开(公告)号：EP1874102A1

    公开(公告)日：2008-01-02

    申请号：EP07012401.1

    申请日：2007-06-25

    Applicant: Ibiden Co., Ltd.

    Inventor： Tanaka, Hironori

    IPC: H05K1/16 ,  H01L23/50

    CPC classification number: H05K1/162 ,  H01L23/49822 ,  H01L23/50 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/112 ,  H05K3/4602 ,  H05K3/4641 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09672 ,  H05K2201/09718 ,  H05K2201/10674 ,  Y10T29/417 ,  Y10T29/4913 ,  H01L2924/00

    Abstract: A wiring board with built-in capacitors, that has a multilayer wiring structure and capable of mounting an IC chip thereon includes: a first capacitor formed so that an overlapping area between a first lower electrode and a first upper electrode provided on respective surfaces of a first dielectric layer is a predetermined area; and a second capacitor built along the same plane as the first dielectric layer and formed so that an overlapping area between a second lower electrode and a second upper electrode provided on respective surfaces of a second dielectric layer with the same thickness as the first dielectric layer is different from the predetermined area. The wiring board further includes: lines that electrically connect a power pad for supplying power to the IC chip and a ground pad for grounding the IC chip to either the first lower electrode or the second lower electrode and to the first upper electrode or the second upper electrode.

    Abstract translation: 具有内置电容器的布线板，其具有多层布线结构并且能够安装IC芯片，其上包括：第一电容器，其形成为使得第一电容器和第一上电极之间的重叠区域设置在 第一电介质层是预定区域; 以及第二电容器，其沿与第一电介质层相同的平面构成，并且形成为使得设置在与第一电介质层相同厚度的第二电介质层的各个表面上的第二下电极和第二上电极之间的重叠区域是 与预定区域不同。 所述布线板还包括：将与所述IC芯片供电的功率垫电连接的线路和用于将所述IC芯片接地到所述第一下部电极或所述第二下部电极以及所述第一上部电极或所述第二上部 电极。

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