METHOD FOR RECOGNIZING PROGRESSIVE OR INTERLACE CONTENTS IN VIDEO SEQUENCE

    公开(公告)号:JP2001103521A

    公开(公告)日:2001-04-13

    申请号:JP2000266755

    申请日:2000-09-04

    Abstract: PROBLEM TO BE SOLVED: To provide a technology that detects whether contents of a picture in a video sequence are of a progressive type or an interlace type. SOLUTION: The technology of this invention demarcates a bottom field Bc of a current picture, a top field Tc of the current picture, a bottom field Bp of a preceding picture, and a top field Tp of the preceding picture. Settling whether the current picture decomposed into the fields Bc and Tc is a progressive picture or an interlace picture recognizes whether contents of the video picture are progressive or interlace contents.

    RECEIVER PART OF TELEPHONE SET
    14.
    发明专利

    公开(公告)号:JP2001068938A

    公开(公告)日:2001-03-16

    申请号:JP2000221032

    申请日:2000-07-21

    Abstract: PROBLEM TO BE SOLVED: To provide a receiver of a telephone set that can suppress noise even when one terminal of an electroacoustic transducer is connected to ground without the need for a filter element. SOLUTION: The receiver part of the telephone set is provided with a signal reception and demodulation device 10, a demodulation signal processing unit 11, an operational amplifier 16, an electroacoustic transducer 13, and a controller 20 of the operational amplifier 16, and also with capacitors C3, C4 connected between a 1st input and an output and between a 2nd input and the output of the operational amplifier 16, a capacitor C13 that is switchingly connected between reference voltage terminal pairs or between the 1st input and the output of the operational amplifier 16 with switches S1, S2 and a capacitor C2S that is switchingly connected between other reference voltage terminal pairs or between the 2nd input of the operational amplifier 16 and other reference voltage terminal with switches S3, S4. A switching means 15 connects the input terminals to a common terminal (RF0) for a period Δt after activation of a signal SW.

    SOI WAFER AND MANUFACTURE PROCESS FOR THE SOI WAFER

    公开(公告)号:JP2001068544A

    公开(公告)日:2001-03-16

    申请号:JP2000225227

    申请日:2000-07-26

    Abstract: PROBLEM TO BE SOLVED: To eliminate defects that the shape of an embedded oxidation region of an SOI wafer has. SOLUTION: A trench is formed in a single-crystal wafer 200 and its internal wall is etched in wet condition to form a cavity 127. After its internal wall is coated with a crystal growth blocking film and a crystal silicon layer 126 is grown on the top surface of the wafer 200, while leaving the cavity 127, a nitride layer 141 is deposited over an oxide layer, the upper part of the cavity is demarcated with a hard mask 142, opened, and thermally oxidized to form an oxide region 127 and a remaining space 128 in the cavity and also form an oxide region 145 even in the opening part. Then polysilicon is deposited over the entire surface of the wafer 200 and the surface is polished to obtain an SOI wafer, having crystal silicon layers 90 and 126 completely inactivated by a continuous buried oxide area 127.

    FLASH INTERCHANGEABILITY EEPROM
    16.
    发明专利

    公开(公告)号:JP2001057089A

    公开(公告)日:2001-02-27

    申请号:JP2000186781

    申请日:2000-06-21

    Abstract: PROBLEM TO BE SOLVED: To enable page erasion having completely interchange ability, that is, adaptability for a standard process by applying negative voltage in which single supply voltage is boosted secondarily to a single word line selected by a row decoder during a erasing phase period, and applying positive voltage- boosted first to a common source of all cells of a block and a separated region of a substrate. SOLUTION: A erasion/write-in control logic circuit 620 drives an adjustor 610 comprising an electric charge pump circuit generating normally negative and positive voltage and a voltage adjustor relating to the circuit and generating the required voltage. Negative boosted voltage generated by the adjustor 610 is supplied to program switches 605A, 605B, row decoders 601A, 601B, source decoders 602A, 602B, and a separated region of a substrate. Algorithm for erasion of a byte erasing block 600B is different from that of a sector erasable block 600A, but each page erasion can be performed by applying pulse sequence of voltage for erasion increased by stages.

    NON-VOLATILE MEMORY HAVING BURST MODE READING FUNCTION AND PAGE MODE READING FUNCTION DURING INTERRUPTION PERIOD OF ELECTRIC CHANGE OPERATION

    公开(公告)号:JP2001057087A

    公开(公告)日:2001-02-27

    申请号:JP2000227222

    申请日:2000-07-27

    Abstract: PROBLEM TO BE SOLVED: To obtain a memory having a burst mode reading function and a page mode reading function while erasing or programming one sector in a semiconductor memory having two or more memory sectors S1-S9. SOLUTION: This semiconductor memory is provided with first control circuit means 4, 6 for controlling the electrical change operation of contents of a memory. The first control circuit means 4 (6) can execute selectively the operation for changing electrically one content of a memory sector and can interrupt the execution so as to be possible to reading-access the other memory sectors. The memory is characterized by providing second control circuit means 8, 6 which can permit burst mode reading or page mode reading operation for reading contents of the other memory sectors.

    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

    公开(公告)号:JP2001044399A

    公开(公告)日:2001-02-16

    申请号:JP2000208131

    申请日:2000-07-10

    Abstract: PROBLEM TO BE SOLVED: To form simply an integration circuit having various types of elements, containing an element insulated completely from a substrate and an element having a low resistance value in DC conductions. SOLUTION: This manufacturing method comprises the processings of injecting doping impurities at a high concentration into a monocrystal silicon substrate 2, to form a first conductivity-type of planer region 42; opening a groove 10 deeper than a depth of the planar region 42 by selection anisotropic etching oxidizing silicon in the interior of the groove 10 starting from a position at a certain distance from the surface of a substrate, to form a silicon dioxide plaque 22, in which a silicon remaining region doped heavily is mounted and performing epitaxial growth between the silicon remaining regions and thereon to fill the groove, and also re distributing doping impurities in a grown silicon, so that a low characteristic resistive embedding region 42' is formed in a high resistivity epitaxial layer 23.

    METHOD AND DEVICE FOR CONTROLLING AUTOMOTIVE, SEMIACTIVE SUSPENSION

    公开(公告)号:JP2001018623A

    公开(公告)日:2001-01-23

    申请号:JP2000189674

    申请日:2000-06-23

    Abstract: PROBLEM TO BE SOLVED: To provide an improved control system for semiactive suspension, for easily adaptable to the necessity and requirement of a user (a vehicle manufacture), and quickly responding to a specific operating condition. SOLUTION: A vehicle is equipped with at least one semiactive suspension 5 arranged between a vehicle body and a wheel, and having an attenuation coefficient variable by a method controlled by an actuator controlled by a control device 18. The device 18 is equipped with: an acceleration measuring sensor 15 for producing the acceleration signal of a vehicle, a potentiometer 16 for producing a suspension position signal, a signal adjusting unit 21 for operating vehicle and attenuation speeds, a fuzzy control unit 23 for operating the successive position of the actuator based on the vehicle and attenuation speeds, and a drive unit 21 for producing a control signal S1 for the actuator.

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