Abstract:
PURPOSE: An electric double layer capacitor is provided to increase a capacitance and reduce a self discharge and internal resistance of a battery. CONSTITUTION: An electric double layer capacitor comprises two or more electrodes; and an ultraviolet hardening gel type polyelectrolyte interposed between the electrodes, and which is constituted by a polymer, organic solvent or liquid electrolyte, and an initiator and hardening accelerator. The polymer is constituted by a function-I polymer containing one of a polyethylene glycol diacrylate(PEDGA) and polyethylene glycol dimethacrylate(PEGDMA) or a mixture thereof; and a function-II polymer containing one of a poly vinylidene fluoride(PVdF) based polymer, poly acrylonitrile(PAN) based polymer, poly methyl methacrylate(PMMA) based polymer and a poly vinyl chloride(PVC) based polymer or a mixture thereof.
Abstract:
PURPOSE: A write signal error protection circuit of a non destructive readout ferroelectric random access memory and a method for preventing the same are provided to effectively remove the write errors caused by a bitline charged by the write operation before the write operation by using the change of the address signal. CONSTITUTION: A write signal error protection circuit of a non destructive readout ferroelectric random access memory(NDRO-FRAM) includes a switch(30) for outputting a plurality of voltages by receiving an address signal, wherein each of the voltages has a different value each other, and a discharging nMOSFET(31) for discharging the electrical charges in the write bit line in response to the voltage.
Abstract:
PURPOSE: A UV curing multi-layered polymer electrolyte and a lithium secondary battery containing the electrolyte are provided, to improve the adhesive strength, the mechanical properties, the low and high temperature characteristics, the high rate discharge capacity, the lifetime, the capacity and the stability of a battery. CONSTITUTION: The electrolyte comprises a separation membrane layer, a UV curing polymer layer and an organic electrolyte solution which is prepared by dissolving a lithium salt into an organic solvent. The separation membrane layer is made of a polymer electrolyte, polypropylene, polyethylene polyvinylidene fluoride or non-woven; the UV curing polymer layer comprises the polymer obtained by UV curing the ethylene glycol di(meth)acrylate oligomer represented by the formula CH2=CR1COO(CH2CH2O)nCOCR2=CH2(wherein R1 and R2 are independent each other and are H or methyl group and n is an integer of 3-20), and the polymer selected from the group consisting of a polyvinylidene fluoride-based polymer, a polyacrylonitrile-based polymer, a poly(methyl methacrylate)-based polymer, a poly(vinyl chloride)-based polymer and their mixtures. Preferably the lithium salt is selected from the group consisting of LiPF6, LiClO4, LiAsF6, LiBF4, LiCF3SO3, Li(CF3SO2)2N and their mixtures; and the organic solvent is selected from the group consisting of ethylene carbonate, propylene carbonate, diethyl carbonate, dimethyl carbonate, ethylmethyl carbonate and their mixtures.
Abstract:
본 발명은 비파괴판독형 불휘발성 기억소자의 메모리 셀 소자 및 그 제조 방법에 관한 것으로서, YMnO 3 등 유전상수가 20 내지 30인 강유전체 재료를 사용하여 금속/ 강유전체/반도체 구조에서의 강유전체 박막을 형성한 게이트를 갖는 트랜지스터를 제조하는 방법을 제공하고 이 트랜지스터를 비파괴 판독형 불휘발성 기억소자의 메모리 셀소자로 사용함에 의해, 동작전압의 상승, 전하주입(charge injection)현상, 문턱전압 변경, 누설전류증가, 메모리셀 이상동작, 강유전체의 포화분극지연등 종래 강유전체를 사용하는 경우에 발생되었던 문제점을 해소할 수 있도록 한 것이다.
Abstract:
PURPOSE: A drive circuit of an NDRO-FRAM(nondestructive readout ferroelectric RAM) is provided to be capable of enabling read and write operations on a NDRO-FRAM. CONSTITUTION: A plurality of NDRO-FRAM cells(2aa-2an..2ma,2mn) comprise a drain, a bulk, a source and a gate and are arranged in rows and columns. Read word lines(30aa-30ma) are connected to drains of the NDRO-FRAM cells. Write word lines(30ab-30mb) are connected to bulks of the NDRO-FRAM cells. Read bit lines(31a-31n) are connected to the sources of the NDRO-FRAM cells. Write bit lines are connected to the gates of the NDRO-FRAM cells. Word line decoders(30a-30m) are connected to the read bit lines(31a-31n) or the write bit lines to generate read or write word signals. Data level transmission circuits(32a-32n) are connected to the read bit lines(31a-31n) to transmit the data levels of the NDRO-FRAM cells. A sense amp(33) is connected to the data level transmission circuits(32a-32n) to sense the data levels of the NDRO-FRAM cells. A write driver(34) is connected to the write bit lines to write bit signals.
Abstract:
PURPOSE: A method for manufacturing WBxNy anti-diffusion film is provided to prevent diffusion of a semiconductor and a main wire metal even when a subsequent thermal process is performed at high temperature over a given temperature range and to prevent degradation of an electrical characteristic and defects. CONSTITUTION: A method for manufacturing WBxNy anti-diffusion film employs a low pressure chemical deposition method or a plasma chemical deposition method. In the low pressure chemical deposition method, with the flow rate of WF5 of 2-10 sccm and the flow rate of H2 of 50-300 sccm. the raw gas is inserted into a vacuum reactor by changing the flow ratio of B10H14/NH13 in the range of 2-5 and the temperature of a substrate is heated at the temperature of 40-300 Celsius at the pressure of below 1-10-1 Torr.
Abstract:
PURPOSE: A method for forming a diffusion barrier of tantalum silicon nitride(TaSiNx), a contact junction and a multi-level interconnection using the barrier, and related methods are provided to keep excellent electric characteristics after high-temperature heat treatment as well. CONSTITUTION: The TaSiNx diffusion barrier is deposited by sputtering, which uses a tantalum silicide(Ta5Si3) target with a nitrogen gas flow varying from 0 to 10 percent with respect to an entire gas flow including argon gas. Thus, the concentration of nitrogen in the diffusion barrier is controlled between 0 and 43 atomic percent. The TaSiNx diffusion barrier is deposited with a thickness of 500Å to 2000Å, and used for contact with silicon, gallium arsenic, gallium nitride, or indium phosphorus. In addition, the TaSiNx diffusion barrier(7) with 28 nitrogen atomic percent or below is used for the contact junction with a source(2) and a drain(3) to a temperature of 700°C. Furthermore, the TaSiNx diffusion barrier(7) with 40 nitrogen atomic percent or more is used for the multi-level interconnection including an interlayer dielectric layer(9) and a metallization layer(8) to a temperature of 900°C.
Abstract translation:目的:提供一种用于形成钽硅氮化物(TaSiNx)的扩散阻挡层的方法,使用该阻挡层的接触点和多层互连以及相关方法,以在高温热处理之后保持优异的电特性。 构成:通过溅射沉积TaSiNx扩散势垒,其使用氮化钽(Ta 5 Si 3)靶,相对于包括氩气的整个气流,氮气流量为0至10%变化。 因此,扩散阻挡层中的氮浓度控制在0〜43原子%之间。 TaSiNx扩散阻挡层以500〜2000的厚度沉积,用于与硅,砷化镓,氮化镓或铟磷的接触。 此外,具有28个氮原子百分比或更低的TaSiNx扩散势垒(7)用于与源(2)和漏极(3)的接触连接至700℃的温度。 此外,具有40个氮原子百分比或更大的TaSiNx扩散势垒(7)用于包括层间电介质层(9)和金属化层(8)至900℃的多层互连。
Abstract:
본 발명은 기억소자 및 비기억소자의 다층구조 금속 연결배선에 관한 것으로, 특히, 그에 사용되는 새로운 구조의 소자 및 그 제조방법에 관한 것이다. 소자 제조시 실리콘(Si) 및 화합물반도체(GaAs, GaN, InP)와 저항성접합공정 및 개별소자간의 상호연결을 위한 다층구조 금속배선 공정에서 반도체/금속, 금속/금속, 층간절연층/금속 사이에 상호확산을 막을 수 있는 확산방지막으로서, 본 발명에서 제안된 삼원소계 확산방지막인 텅스텐보론나이트라이드 (WB x N y )를 사용하므로써, 종래의 이원소계 확산방지막이 열처리온도 500∼700℃에서 확산방지 기능이 상실되어서 높은 밀도의 결함 및 전기적특성의 열화를 막을 수 없느데 반하여, 850℃이상의 고온에서 후속열처리하여도 반도체 및 구리금속의 확산을 방지하였으며, 전기적 특성의 열화 및 결함이 전혀 발생하지 않는다. 따라서 본 발명은 기억소자 및 비기억소자의 제조 방법에서 새로운 다층금속배선 구조중의 확산방지막으로 텅스텐보론나이트라이드를 사용하므로써, 기존의 확산방지막을 사용한 경우보다 월등히 우수한 전기적특성을 가지는 다층금속배선을 제공한다.
Abstract:
A fabrication method of ferroelectric capacitors is provided to improve the performance of capacitor by changing material of a substrate electrode. The method comprises the steps of: forming a substrate electrode composed of WN/W, W/Pt, WN/Pt. or WN/W/Pt; and forming a ferroelectric film by depositing BaTiO3 or PbTiO3 contained of Zr, Ln, Mg, Nb, BaTiO3 or PbTiO3 compound using sputtering or chemical vapor deposition at 600-700deg.C for 1-2 hours. Thereby, it is possible to improve the electric and physical characteristics of ferroelectric capacitor using the electrode made of WN/W, W/Pt, WN/Pt. or WN/W/Pt.
Abstract:
본 발명은 반도체 금속박막의 배선방법에 관한 것으로, 저압 화학 기상 증착법 또는 플라즈마 화학 기상중착법에 의해 질화 텅스텐 박막을 확산방지막으로 하여 구리로 중착시키도록 한 것이다. 이러한 금속배선방법은 먼저 기판(3)상에 플라즈마 화학증착법으로 질화 텅스텐 확산 방지막(7)을 도포하고, 금속층(1) (6)인 Cu를 중착시키며, 접촉상으로서의 비아콘택 영역(5)과 금속층(1)을 연결시킬 때는 역시 플리즈마 화학중착법으로 중착된 질화 텅스텐 박막을 확산방지막으로 사용하여 금속배선하도록 한 것으로, 확산방지막인 질화 텅스텐 박막은 실리콘 기판(3)과 금속층(1)이 접촉되는 콘택 영역(2), 금속층(1) (6)과 절연막 (4)사이, 금속층(1) (6)이 접촉되는 비아콘택 영역(5)에 적용되는 것이다. 이와 같이 Cu 확산방지를 위한 확산방지막으로 텅스텐 질화박막이 우수한 특성을 지님을 알 수 있다.