公开(公告)号：EP2617149A4

公开(公告)日：2013-09-04

申请号：EP11826056

申请日：2011-09-16

Applicant: ALTERA CORP

Inventor： DING WEIQI ,  PAN MINGDE ,  LI PENG ,  SHUMARAYEV SERGEI ,  SHIMANOUCHI MASASHI

IPC: H04L1/20 ,  G01R29/02 ,  G01R31/3181

CPC classification number: H04L1/203 ,  G01R31/3171

Abstract: An IC that includes an eye viewer and a BER checker coupled to the eye viewer, where the BER checker receives a serial data signal from the eye viewer, is provided. In one implementation, the BER checker receives the serial data signal from the eye viewer without the serial data signal passing through a deserializer. In one implementation, the BER checker compares the serial data signal against a reference data signal to determine the BER for the serial data signal. In one implementation, the IC includes an IC core coupled to the eye viewer and the BER checker, where the BER checker is outside the IC core. In one implementation, the BER checker is a dedicated BER checker. In one implementation, the BER checker includes an exclusive OR gate, a programmable delay circuit coupled to the exclusive OR gate, and an error counter coupled to the exclusive OR gate.

Abstract translation: 提供了包括眼睛观察器和耦合到眼睛观察器的BER检查器的IC，其中BER检查器从眼睛观察器接收串行数据信号。 在一个实现中，BER检查器接收来自观看者的串行数据信号，而串行数据信号不经过解串器。 在一个实现中，BER检查器将串行数据信号与参考数据信号进行比较以确定串行数据信号的BER。 在一个实现中，IC包括耦合到眼睛观察器和BER检查器的IC内核，其中BER检查器在IC内核之外。 在一个实现中，BER检查器是专用的BER检查器。 在一个实现中，BER检查器包括异或门，耦合到异或门的可编程延迟电路以及耦合到异或门的错误计数器。

公开(公告)号：EP2342749A4

公开(公告)日：2012-10-17

申请号：EP09818220

申请日：2009-09-17

Applicant: ALTERA CORP

Inventor： XIANG QI ,  RATNAKUMAR ALBERT ,  TUNG JEFFREY XIAOQI ,  DING WEIQI

IPC: H01L27/088 ,  G05F3/20 ,  H01L21/265 ,  H01L29/10 ,  H01L29/66 ,  H01L29/78

CPC classification number: G05F3/205 ,  H01L29/1083 ,  H01L29/6659 ,  H01L29/7833

公开(公告)号：EP2553817A4

公开(公告)日：2016-11-16

申请号：EP11759912

申请日：2011-03-15

Applicant: ALTERA CORP

Inventor： DING WEIQI ,  SHUMARAYEV SERGEY ,  WONG WILSON ,  ATESOGLU ALI ,  IPPILI SHARAT BABU

IPC: H03L7/099 ,  H01F17/00

CPC classification number: H03B5/1212 ,  H01F2021/125 ,  H01F2027/2809 ,  H01L2924/0002 ,  H03B5/1243 ,  H03B5/1268 ,  H01L2924/00

Abstract: Integrated circuits with phase-locked loops are provided. Phase-locked loops may include an oscillator, a phase-frequency detector, a charge pump, a loop filter, a voltage-controlled oscillator, and a programmable divider. The voltage-controlled oscillator may include multiple inductors, an oscillator circuit, and a buffer circuit. A selected one of the multiple inductors may be actively connected to the oscillator circuit. The voltage-controlled oscillators may have multiple oscillator circuits. Each oscillator circuit may be connected to a respective inductor, may include a varactor, and may be powered by a respective voltage regulator. Each oscillator circuit may be coupled to a respective input transistor pair in the buffer circuit through associated coupling capacitors. A selected one of the oscillator circuits may be turned on during normal operation by supplying a high voltage to the selected one of the oscillator circuit and by supply a ground voltage to the remaining oscillator circuits.

公开(公告)号：EP2545649A4

公开(公告)日：2015-10-14

申请号：EP11753923

申请日：2011-03-08

Applicant: ALTERA CORP

Inventor： DING WEIQI ,  PAN MINGDE

IPC: H03K3/023 ,  H03K3/356 ,  H03K5/08

CPC classification number: H03K3/356139 ,  H03K5/08

公开(公告)号：EP2603805A4

公开(公告)日：2016-10-19

申请号：EP11816812

申请日：2011-08-02

Applicant: ALTERA CORP

Inventor： LI PENG ,  SHIMANOUCHI MASASHI ,  SHUMARAYEV SERGEY ,  DING WEIQI ,  NARAYAN SRIRAM ,  CHOW DANIEL TUN LAI ,  PAN MINGDE

IPC: G01R31/303 ,  G01R31/317 ,  H04L7/033

CPC classification number: G01R31/31709 ,  G01R31/3171 ,  G01R31/31716 ,  H04L7/0337

公开(公告)号：EP2695303A4

公开(公告)日：2014-10-08

申请号：EP12767589

申请日：2012-03-27

Applicant: ALTERA CORP

Inventor： DING WEIQI ,  SHUMARAYEV SERGEY ,  WONG WILSON ,  HOANG TIM TRI ,  KE YANJING

IPC: H04B1/04 ,  H03K3/017 ,  H03L7/00

CPC classification number: H03K5/1565 ,  H03K3/017 ,  H03K5/12 ,  H03M9/00