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公开(公告)号:DE602005005302T2
公开(公告)日:2009-03-12
申请号:DE602005005302
申请日:2005-01-13
Applicant: IBM
Inventor: FURUKAWA TOSHIHARU , HAKEY MARK CHARLES , HOLMES STEVEN JOHN , HORAK DAVID VACLAV , MITCHELL PETER , NESBIT LARRY ALAN
Abstract: Vertical field effect transistors having a channel region defined by at least one semiconducting nanotube and methods for fabricating such vertical field effect transistors by chemical vapor deposition using a spacer-defined channel. Each nanotube is grown by chemical vapor deposition catalyzed by a catalyst pad positioned at the base of a high-aspect-ratio passage defined between a spacer and a gate electrode. Each nanotube grows in the passage with a vertical orientation constrained by the confining presence of the spacer. A gap may be provided in the base of the spacer remote from the mouth of the passage. Reactants flowing through the gap to the catalyst pad participate in nanotube growth.
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公开(公告)号:DE602005005302D1
公开(公告)日:2008-04-24
申请号:DE602005005302
申请日:2005-01-13
Applicant: IBM
Inventor: FURUKAWA TOSHIHARU , HAKEY MARK CHARLES , HOLMES STEVEN JOHN , HORAK DAVID VACLAV , MITCHELL PETER , NESBIT LARRY ALAN
Abstract: Vertical field effect transistors having a channel region defined by at least one semiconducting nanotube and methods for fabricating such vertical field effect transistors by chemical vapor deposition using a spacer-defined channel. Each nanotube is grown by chemical vapor deposition catalyzed by a catalyst pad positioned at the base of a high-aspect-ratio passage defined between a spacer and a gate electrode. Each nanotube grows in the passage with a vertical orientation constrained by the confining presence of the spacer. A gap may be provided in the base of the spacer remote from the mouth of the passage. Reactants flowing through the gap to the catalyst pad participate in nanotube growth.
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公开(公告)号:AU624467B2
公开(公告)日:1992-06-11
申请号:AU4778890
申请日:1990-01-08
Applicant: IBM
Inventor: DOBUZINSKY DAVID MARK , HAKEY MARK CHARLES , HOLMES STEVEN JOHN , HORAK DAVID VACLAV
IPC: C08G77/06 , C08G77/48 , C08G77/60 , C09D183/00 , C09D183/16 , C23C14/14 , C23C14/24 , G03F7/075 , G03F7/16 , H01L21/027 , H01L21/30 , H01L21/312 , C01B33/04 , C23C16/24
Abstract: Disclosed is a process for forming a film comprising a polysilane composition on a substrate. The film is formed by vapor deposition directly on a substrate, thus avoiding the cumbersome steps ordinarily encountered in preparing and applying polysilanes by conventional spin application techniques. The film is used in a lithographic process for forming an image on a substrate.
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公开(公告)号:DE3585047D1
公开(公告)日:1992-02-13
申请号:DE3585047
申请日:1985-04-17
Applicant: IBM
Inventor: BADAMI DINESH ARVINDLAL , HAKEY MARK CHARLES , MORITZ HOLGER
IPC: H01L21/027 , G03F7/039 , G03F7/20 , G03F7/26 , G03F7/40 , H01L21/30 , H01L21/00 , H01L21/308
Abstract: A optical photolithographic process in which resist lines having widths in the micron and sub-micron range are produced without the use of a fragile photomask. A positive photoresist having an additive for image reversal is applied to the surface of a semiconductor substrate (10). The photoresist is exposed through a photomask (30) to ultraviolet light. The edges of the opaque sections of the mask diffract the ultraviolet light, forming partially exposed areas (24) between the exposed (22) and unexposed areas (26) formed in the photoresist. After development in a solvent to remove the exposed areas, the photoresist undergoes an image reversal process. The photoresist is first baked at 100 DEG C for 30 minutes. During this bake step, the photoactive decomposition products present in the partially exposed areas (24) react, freezing the solubility of the partially exposed areas (24) with respect to that of the unexposed areas (26). The photoresist is then blanket exposed and developed in a solvent, leaving the partially exposed areas (24) on the substrate. The resulting thin resist lines can be used to form narrow isolation trenches by coating the substrate with a quartz film and lifting off the resist lines.
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公开(公告)号:DE602005027316D1
公开(公告)日:2011-05-19
申请号:DE602005027316
申请日:2005-02-10
Applicant: IBM
Inventor: FURUKAWA TOSHIHARU , HAKEY MARK CHARLES , HOLMES STEVEN JOHN , HORAK DAVID VACLAV , KOBURGER CHARLES WILLIAM , MITCHELL PETER , NESBIT LARRY ALAN
IPC: H01L51/05 , G11C13/02 , H01L21/335 , H01L21/336 , H01L27/28 , H01L29/06 , H01L29/12 , H01L29/772 , H01L51/30 , H01L51/40
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公开(公告)号:BR9000665A
公开(公告)日:1991-01-15
申请号:BR9000665
申请日:1990-02-14
Applicant: IBM
Inventor: DOBUZINSKY DAVID MARK , HAKEY MARK CHARLES , HOLMES STEVEN JOHN , HORAK DAVID VACLAV
IPC: C08G77/06 , C08G77/48 , C08G77/60 , C09D183/00 , C09D183/16 , C23C14/14 , C23C14/24 , G03F7/075 , G03F7/16 , H01L21/027 , H01L21/30 , H01L21/312 , B05D5/12 , C23C16/00 , G03C5/00
Abstract: Disclosed is a process for forming a film comprising a polysilane composition on a substrate. The film is formed by vapor deposition directly on a substrate, thus avoiding the cumbersome steps ordinarily encountered in preparing and applying polysilanes by conventional spin application techniques. The film is used in a lithographic process for forming an image on a substrate.
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公开(公告)号:AU4778890A
公开(公告)日:1990-08-23
申请号:AU4778890
申请日:1990-01-08
Applicant: IBM
Inventor: DOBUZINSKY DAVID MARK , HAKEY MARK CHARLES , HOLMES STEVEN JOHN , HORAK DAVID VACLAV
IPC: C08G77/06 , C08G77/48 , C08G77/60 , C09D183/00 , C09D183/16 , C23C14/14 , C23C14/24 , G03F7/075 , G03F7/16 , H01L21/027 , H01L21/30 , H01L21/312 , C01B33/04 , C23C16/24
Abstract: Disclosed is a process for forming a film comprising a polysilane composition on a substrate. The film is formed by vapor deposition directly on a substrate, thus avoiding the cumbersome steps ordinarily encountered in preparing and applying polysilanes by conventional spin application techniques. The film is used in a lithographic process for forming an image on a substrate.
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18.
公开(公告)号:DE3371837D1
公开(公告)日:1987-07-02
申请号:DE3371837
申请日:1983-10-11
Applicant: IBM
IPC: H01L21/76 , H01L21/265 , H01L21/31 , H01L21/762 , H01L29/06
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