中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

20 records (took 0.017 seconds)

    12.
    发明专利
    未知

    公开(公告)号：DE68916784D1

    公开(公告)日：1994-08-18

    申请号：DE68916784

    申请日：1989-04-20

    Applicant: IBM

    Inventor： SCHETTLER HELMUT DIPL ING ,  LUDWIG THOMAS DIPL ING ,  WAGNER OTTO M DIPL-ING ,  HAUG WERNER O DIPL ING ,  KLINK ERICH ,  KROELL KARL E DIPL-PHYS ,  STAHL RAINER DIPL ING

    IPC: H01L21/60 ,  H01L23/14 ,  H01L23/64

    Abstract: Integrated circuit package comprising at least one active integrated circuit chip (1) mounted and electrically connected to a power supply distribution wiring and a chip interconnection and signal wiring both formed on the topsurface of a passive semiconductor interconnection carrier (2) in which a power supply decoupling capacitor is implemented. Spaced wells (4) of a first conductivity type are provided in the surface of said carrier of a second conductivity type. The power supply distribution wiring comprises first and second conductive lines (5, 6) within a first wiring level (WL1). Said first conductive lines (5) are deposited on the surface areas of said wells (4) in an ohmic contact relationship and said second conductive lines (6) are deposited on the surface areas of said carrier (2) between said wells (4) in an ohmic contact relationship. Said first and second conductive lines are connected to first and second terminals of the power supply, respectively, so that the junction capacitance between said wells (4) and the carrier material (2) embedding said wells forms said decoupling capacitor.

    15.
    发明专利
    未知

    公开(公告)号：AT467132T

    公开(公告)日：2010-05-15

    申请号：AT07847223

    申请日：2007-11-20

    Applicant: IBM

    Inventor： FRECH ROLAND ,  KLINK ERICH ,  SAALMUELLER JUERGEN

    IPC: G01R31/28 ,  G01R31/02 ,  G01R31/3185 ,  H04B3/46 ,  H04M3/34

    Abstract: A method for determining current return path integrity in an electric device with a plurality of signal lines and supply lines. A library with at least one reference signal pattern of a near end crosstalk signal on a defined signal line arising from an input signal on another defined signal line is provided, a predetermined signal to a selected signal line of the electric device is applied, the near end crosstalk signal on at least one further signal line of the electric device is detected, said near end crosstalk signal is compared with the corresponding reference signal pattern from the library, and if there is a deviation between the near end crosstalk signal and the corresponding reference signal pattern, an information that there is any defect in the electric device is displayed.

    17.
    发明专利
    未知

    公开(公告)号：DE68916784T2

    公开(公告)日：1995-01-05

    申请号：DE68916784

    申请日：1989-04-20

    Applicant: IBM

    Inventor： SCHETTLER HELMUT DIPL ING ,  LUDWIG THOMAS DIPL ING ,  WAGNER OTTO M DIPL-ING ,  HAUG WERNER O DIPL ING ,  KLINK ERICH ,  KROELL KARL E DIPL-PHYS ,  STAHL RAINER DIPL ING

    IPC: H01L21/60 ,  H01L23/14 ,  H01L23/64

    Abstract: Integrated circuit package comprising at least one active integrated circuit chip (1) mounted and electrically connected to a power supply distribution wiring and a chip interconnection and signal wiring both formed on the topsurface of a passive semiconductor interconnection carrier (2) in which a power supply decoupling capacitor is implemented. Spaced wells (4) of a first conductivity type are provided in the surface of said carrier of a second conductivity type. The power supply distribution wiring comprises first and second conductive lines (5, 6) within a first wiring level (WL1). Said first conductive lines (5) are deposited on the surface areas of said wells (4) in an ohmic contact relationship and said second conductive lines (6) are deposited on the surface areas of said carrier (2) between said wells (4) in an ohmic contact relationship. Said first and second conductive lines are connected to first and second terminals of the power supply, respectively, so that the junction capacitance between said wells (4) and the carrier material (2) embedding said wells forms said decoupling capacitor.

    19.
    发明专利
    未知

    公开(公告)号：BR8404041A

    公开(公告)日：1985-09-03

    申请号：BR8404041

    申请日：1984-08-13

    Applicant: IBM

    Inventor： BROSCH RUDOLF ,  KEINERT JOACHIM ,  KLINK ERICH ,  WERNICKE FRIEDRICH C

    IPC: H03K3/286 ,  H03K3/288 ,  H03K5/02 ,  H03K5/151 ,  H03K19/00

    Abstract: A phase splitter with latch comprises a true complement generator in the form of a current switch (T1, T2, T3, R3) which supplies two complementary output signals in response to an input signal (VIN). The outputs of this true complement generator are in each case connected to an associated emitter follower (T4, T5). The two emitter followers (T4, T5) have identical emitter resistors (R6, R7) which simultaneously serve as collector load resistors of two cross-coupled transistors (T6, T7) also comprise identical but higher emitter resistors (R13, R14) than the emitter followers (T6, T7). The emitters of the cross-coupled transistors (T6, T7) are each connected to one of the two inputs of an output stage (T8, T9, T11) consisting of a current switch. This current switch is connected to operating voltage (VEE) through a clock-controlled transitor (T11). Upon actuation of the output stage, i.e., when transistor (T11) is on, the active emitter resistance of one of the cross-coupled transistors (T6, T7) is pulled below the value of the emitter resistors (R6, R7) of the emitter followers (T4, T5), thus causing the latch circuit to be latched as a function of the input signal.

Patent Agency Ranking