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    Method for forming a porous dielectric material layer in a semiconductor device and device formed
    11.
    发明专利
    Method for forming a porous dielectric material layer in a semiconductor device and device formed 未知

    公开(公告)号：SG125963A1

    公开(公告)日：2006-10-30

    申请号：SG200403087

    申请日：2001-12-11

    Applicant: IBM

    Inventor： DALTON TIMOTHY JOSEPH ,  GRECO STEPHEN EDWARD ,  HEDRICK JEFFREY CURTIS ,  NITTA SATYANARANA V ,  PURUSHOTHAMAN SAMPATH ,  RODBELL KENNETH PARKER ,  ROSENBERG ROBERT

    IPC: H01L21/31 ,  H01L21/316 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/532

    Abstract: A method for forming a porous dielectric material layer (14) in an electronic structure (70) and the stricture (70) formed are disclosed. In the method, a porous dielectric layer (14) in a semiconductor device (70) can be formed by first forming (10) a non-porous dielectric layer (14),- then partially curing (20), patterning (30) by reactive ion etching, and final curing (40) the non-porous dielectric layer (14) at a higher temperature than the partial curing (20) temperature to transform the non-porous dielectric material (14) into a porous dielectric material (14), thus achieving 'a dielectric material that has significantly improved dielectric constant, i.e. smaller than 2.6. The non-porous dielectric material (14) may be formed by embedding a thermally stable dielectric material such as methyl silsesquioxane, hydrogen silsesquioxane, benzocyclobutene or aromatic thermoset polymers with a second phase polymeric material therein such that, at the higher curing temperature, the second phase polymeric material substantially volatilizes to leave voids behind forming a void-filled dielectric material.

    METHOD FOR FORMING ELECTROMIGRATION-RESISTANT STRUCTURES BY DOPING
    12.
    发明专利
    METHOD FOR FORMING ELECTROMIGRATION-RESISTANT STRUCTURES BY DOPING 未知

    公开(公告)号：MY124349A

    公开(公告)日：2006-06-30

    申请号：MYPI9905231

    申请日：1999-12-02

    Applicant: IBM

    Inventor： ANDRICACOS PANAYOTIS CONSTANTINOU ,  CABRAL CYRIL JR ,  PARKS CHRISTOPHER CARR ,  RODBELL KENNETH PARKER ,  TSAI ROGER-YEN-LUEN

    IPC: H01L21/00 ,  H01L21/265 ,  H01L21/3205 ,  H01L21/283 ,  H01L21/288 ,  H01L21/768 ,  H01L23/52 ,  H01L23/532

    Abstract: A METHOD FOR FORMING A COPPER CONDUCTOR (56, 58) IN AN ELECTRONIC STRUCTURE (50) BY FIRST DEPOSITING A COPPER COMPOSITION (88, 90, 100) IN A RECEPTACLE FORMED IN THE ELECTRONIC STRUCTURE, AND THEN ADDING IMPURITIES INTO THE COPPER COMPOSITION SUCH THAT ITS ELECTROMIGRATION RESISTANCE IS IMPROVED IS DISCLOSED. IN THE METHOD, THE COPPER COMPOSITION CAN BE DEPOSITED BY A VARIETY OF TECHNIQUES SUCH AS ELECTROPLATING, PHYSICAL VAPOR DEPOSITION AND CHEMICAL VAPOR DEPOSITION. THE IMPURITIES WHICH CAN BE IMPLANTED INCLUDE THOSE OF C, O, CI, S AND N AT A SUITABLE CONCENTRATION RANGE BETWEEN ABOUT 0.01 PPM BY WEIGHT AND ABOUT 1000 PPM BY WEIGHT.THE IMPURITIES CAN BE ADDED BY THREE DIFFERENT METHODS. IN THE FIRST METHOD, A COPPER SEED LAYER IS FIRST DEPOSITED INTO A RECEPTACLE AND AN ION IMPLANTATION PROCESS IS CARRIED OUT ON THE SEED LAYER, WHICH IS FOLLOWED BY ELECTROPLATING COPPER INTO THE RECEPTACLE. IN THE SECOND METHOD, A COPPER SEED LAYER IS FIRST DEPOSITED INTO A RECEPTACLE, A COPPER COMPOSITION CONTAINING IMPURITIES IS THEN ELECTRODEPOSITED INTO THE RECEPTACLE AND THE ELECTRONIC STRUCTURE IS ANNEALED SO THAT IMPURITIES DIFFUSE INTO THE COPPER SEED LAYER. IN THE THIRD METHOD, A BARRIER LAYER (82, 94) IS FIRST DEPOSITED INTO A RECEPTACLE, DOPANT IONS ARE THEN IMPLANTED INTO THE BARRIER LAYER WITH A COPPER SEED LAYER (84, 96) SUBSEQUENTLY DEPOSITED ON TOP OF THE BARRIER LAYER. AN ANNEALING PROCESS FOR THE ELECTRONIC STRUCTURE IS THEN CARRIED OUT SUCH THAT DOPANT IONS DIFFUSE INTO THE COPPER SEED LAYER. THE PRESENT INVENTION METHOD MAY FURTHER INCLUDE THE STEP OF ION-IMPLANTING AT LEAST ONE ELEMENT INTO A SURFACE LAYER OF THE COPPER CONDUCTOR (90, 100) AFTER THE CONDUCTOR IS FIRST PLANARIZED. THE SURFACE LAYER MAY HAVE A THICKNESS BETWEEN ABOUT 30 A AND ABOUT 500 A. AT LEAST ONE ELEMENT MAY BE SELECTED FROM CO, AI, SN, IN, TI AND CR.FIG. 2

    Method for forming a porous dielectric material l ayer in a semiconductor device
    14.
    发明专利
    Method for forming a porous dielectric material l ayer in a semiconductor device 未知

    公开(公告)号：HK1055641A1

    公开(公告)日：2004-01-16

    申请号：HK03107854

    申请日：2003-10-31

    Applicant: IBM

    Inventor： DALTON TIMOTHY JOSEPH ,  GRECO STEPHEN EDWARD ,  HEDRICK JEFFREY CURTIS ,  NITTA SATYANARAYANA V ,  PURUSHOTHAMAN SAMPATH ,  RODBELL KENNETH PARKER ,  ROSENBERG ROBERT

    IPC: H01L21/316 ,  H01L21/31 ,  H01L21/768 ,  H01L23/532 ,  H01L

    Abstract: A method for forming a porous dielectric material layer in an electronic structure and the structure formed are disclosed. In the method, a porous dielectric layer in a semiconductor device can be formed by first forming a non-porous dielectric layer, then partially curing, patterning by reactive ion etching, and final curing the non-porous dielectric layer at a higher temperature than the partial curing temperature to transform the non-porous dielectric material into a porous dielectric material, thus forming a dielectric material that has a low dielectric constant, i.e. smaller than 2.6. The non-porous dielectric material may be formed by embedding a thermally stable dielectric material such as methyl silsesquioxane, hydrogen silsesquioxane, benzocyclobutene or aromatic thermoset polymers with a second phase polymeric material therein such that, at the higher curing temperature, the second phase polymeric material substantially volatilizes to leave voids behind forming a void-filled dielectric material.

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