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公开(公告)号:DE10343084A1
公开(公告)日:2005-05-04
申请号:DE10343084
申请日:2003-09-17
Applicant: INFINEON TECHNOLOGIES AG
Inventor: ZUNDEL MARKUS , ZELSACHER RUDOLF , PERI HERMANN , KOTZ DIETMAR , KNAPP ACHIM
Abstract: The semiconducting wafer has a number of chips (3) to be separated from each other by isolating frames, each with a cell field (6) in their inner regions and with a chipping stopper in their edge regions (4b). The chipping stopper consists of at least one trench (5a,5b) in which an electrically inactive material is filled and/or in which a cavity is formed. An independent claim is also included for a method of separating a wafer into a number of chips along sawing lines.
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公开(公告)号:DE59812312D1
公开(公告)日:2005-01-05
申请号:DE59812312
申请日:1998-01-16
Applicant: INFINEON TECHNOLOGIES AG
Inventor: STECHER DR , PERI HERMANN
IPC: H01L21/033 , H01L21/336 , H01L21/60 , H01L21/8234 , H01L21/8249 , H01L27/06 , H01L29/06 , H01L29/78
Abstract: In the production of a semiconductor body having a first self-aligned structure region (A) and a remaining second region (B), involving applying and structuring an oxide layer (22) on the body front face and then applying a semiconductor layer (24) and an insulation layer (26), the process further comprises: (a) structuring the insulation layer (26), by photo-technology and subsequent etching, to remove the layer entirely from the second region (B) while leaving it on at least part of the first region (A); and (b) employing photo-technology and subsequent etching to structure the semiconductor layer (24) and the portions consisting of the insulation layer (26) and the semiconductor layer (24). Preferably, a number of DMOSFETs are integrated in the first region (A).
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公开(公告)号:DE19840031C2
公开(公告)日:2002-09-19
申请号:DE19840031
申请日:1998-09-02
Applicant: INFINEON TECHNOLOGIES AG
Inventor: VIETZKE DIRK , STECHER MATTHIAS , MOSIG KARSTEN , PERI HERMANN , SCHWETLICK WERNER , MAIR ANDREAS , KOTZ DIETMAR , KROTSCHECK THOMAS , GRILZ REINHOLD
IPC: H01L21/761 , H01L29/10 , H01L29/78
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