公开(公告)号：AT552533T

公开(公告)日：2012-04-15

申请号：AT06793213

申请日：2006-09-05

Applicant: IBM

Inventor： HOLMES STEVEN ,  FURUKAWA TOSHIHARU ,  KOBURGER CHARLES ,  MOUMEN NAIM

IPC: G03F7/20 ,  G03F7/11

Abstract: An immersion lithography system is provided which includes an optical source operable to produce light having a nominal wavelength and an optical imaging system. The optical imaging system has an optical element in an optical path from the optical source to an article to be patterned thereby. The optical element has a face which is adapted to contact a liquid occupying a space between the face and the article. The optical element includes a material which is degradable by the liquid and a protective coating which covers the degradable material at the face for protecting the face from the liquid, the protective coating being transparent to the light, stable when exposed to the light and stable when exposed to the liquid.

公开(公告)号：RU2498446C2

公开(公告)日：2013-11-10

申请号：RU2011132473

申请日：2009-11-19

Applicant: IBM ,  FRISKEJL SEMIKONDAKTOR INK

Inventor： RAMACHANDRAN RAVIKUMAR ,  JAN KHUNVEHN ,  MOUMEN NAIM ,  SHEHFFER DZHEJMS KENION ,  KRISHNAN SIDDART A ,  VON KEJT KVON KHON ,  KVON UNOKH ,  BELJANSKI MAJKL P ,  UAJZ RICHARD

IPC: H01L21/3205 ,  B82B3/00

Abstract: Изобретениеотноситсяк получениюмногослойнойзатворнойструктурыдляполевоготранзистора. Сущностьизобретения: способполучениямногослойнойзатворнойструктурыдляполевыхтранзистороввключаетформированиеметаллсодержащегослоянепосредственнонапервомслоенитридатитана TiN, покрывающемобластиполупроводниковойподложки, предназначенныедляпервогои второготиповполевыхтранзисторов, формированиезащитногослояпутемнанесениявторого TiN-слояповерхметаллсодержащегослоя, формированиерисунканавтором TiN-слоеи металлсодержащемслоедляпокрытиятолькопервойчастипервого TiN-слоя, покрывающейобласть, предназначеннуюдляполевыхтранзисторовпервоготипа, вытравливаниевторойчастипервого TiN-слоя, оставшейсяоткрытойприформированиирисунка, втовремякакперваячастьпервого TiN-слояостаетсязащищеннойоттравлениязасчетеезакрытияпоменьшеймеречастьютолщиныметаллсодержащегослоя, накоторомсформированрисунок, иформированиетретьего TiN-слоя, покрывающегообластьполупроводниковойподложки, предназначеннуюдлявтороготипаполевыхтранзисторов. Изобретениеобеспечиваетусовершенствованиетехнологииполучениямногослойнойзатворнойструктуры. 3 н. и 24 з.п. ф-лы, 9 ил.

公开(公告)号：SG174129A1

公开(公告)日：2011-10-28

申请号：SG2011057288

申请日：2010-03-29

Applicant: IBM

Inventor： BU HUIMING ,  CHUDZIK MICHAEL P ,  HE WEI ,  JHA RASHMI ,  KIM YOUNG-HEE ,  KRISHNAN SIDDARTH A ,  MO RENEE T ,  MOUMEN NAIM ,  NATZLE WESLEY C

Abstract: A method of forming a device includes providing a substrate, forming an interfacial layer on the substrate, depositing a high-k dielectric layer on the interfacial layer, depositing an oxygen scavenging layer on the high-k dielectric layer and performing an anneal. A high-k metal gate transistor includes a substrate, an interfacial layer on the substrate, a high-k dielectric layer on the interfacial layer and an oxygen scavenging layer on the high-k dielectric layer.

公开(公告)号：MX2011008338A

公开(公告)日：2011-09-01

申请号：MX2011008338

申请日：2010-03-29

Applicant: IBM

Inventor： BU HUIMING ,  CHUDZIK MICHAEL P ,  HE WEI ,  JHA RASHMI ,  KIM YOUNG-HEE ,  KRISHNAN SIDDARTH A ,  MO RENEE T ,  MOUMEN NAIM ,  NATZLE WESLEY C

IPC: H01L21/336

Abstract: El método para formar un dispositivo incluye proporcionar un sustrato, formar una capa interfacial sobre el sustrato, depositar una capa dieléctrica de k alta sobre la capa interfacial, depositar una capa depuradora de oxígeno sobre la capa dieléctrica de k alta y efectuar un recocido. Un transistor de compuerta de metal de k alta incluye un sustrato, una capa interfacial sobre el sustrato, una capa dieléctrica de k alta sobre la capa interfacial y una capa depuradora de oxígeno sobre la capa dieléctrica de k alta.

公开(公告)号：GB2488421B

公开(公告)日：2013-11-20

申请号：GB201202928

申请日：2010-10-26

Applicant: IBM

Inventor： MOUMEN NAIM ,  MARTIN YVES ,  KESSEL THEODORE GERARD VAN ,  SANDSTROM ROBERT ,  GUHA SUPRATIK

IPC: H01L31/0224 ,  H01L31/0687

Abstract: Electrical contact to the front side of a photovoltaic cell is provided by an array of conductive through-substrate vias, and optionally, an array of conductive blocks located on the front side of the photovoltaic cell. A dielectric liner provides electrical isolation of each conductive through-substrate via from the semiconductor material of the photovoltaic cell. A dielectric layer on the backside of the photovoltaic cell is patterned to cover a contiguous region including all of the conductive through-substrate vias, while exposing a portion of the backside of the photovoltaic cell. A conductive material layer is deposited on the back surface of the photovoltaic cell, and is patterned to form a first conductive wiring structure that electrically connects the conductive through-substrate vias and a second conductive wiring structure that provides electrical connection to the backside of the photovoltaic cell.

公开(公告)号：GB2488421A

公开(公告)日：2012-08-29

申请号：GB201202928

申请日：2010-10-26

Applicant: IBM

Inventor： MOUMEN NAIM ,  MARTIN YVES ,  KESSEL THEODORE GERARD VAN ,  SANDSTROM ROBERT ,  GUHA SUPRATIK

IPC: H01L31/0224 ,  H01L31/0687

Abstract: Electrical contact to the front side of a photovoltaic cell is provided by an array of conductive through-substrate vias, and optionally, an array of conductive blocks located on the front side of the photovoltaic cell. A dielectric liner provides electrical isolation of each conductive through-substrate via from the semiconductor material of the photovoltaic cell. A dielectric layer on the backside of the photovoltaic cell is patterned to cover a contiguous region including all of the conductive through-substrate vias, while exposing a portion of the backside of the photovoltaic cell. A conductive material layer is deposited on the back surface of the photovoltaic cell, and is patterned to form a first conductive wiring structure that electrically connects the conductive through-substrate vias and a second conductive wiring structure that provides electrical connection to the backside of the photovoltaic cell.

公开(公告)号：CA2750282A1

公开(公告)日：2010-10-07

申请号：CA2750282

申请日：2010-03-29

Applicant: IBM

Inventor： BU HUIMING ,  CHUDZIK MICHAEL P ,  HE WEI ,  JHA RASHMI ,  KIM YOUNG-HEE ,  KRISHNAN SIDDARTH A ,  MO RENEE T ,  MOUMEN NAIM ,  NATZLE WESLEY C

IPC: H01L21/283 ,  H01L21/285 ,  H01L21/324 ,  H01L29/40 ,  H01L29/43

Abstract: A method of forming a device includes providing a substrate, forming an interfacial layer on the substrate, depositing a high-k dielectric layer on the interfacial layer, depositing an oxygen scavenging layer on the high-k dielectric layer and performing an anneal. A high-k metal gate transistor includes a substrate, an interfacial layer on the substrate, a high-k dielectric layer on the interfacial layer and an oxygen scavenging layer on the high-k dielectric layer.