-
271.发明专利
公开(公告)号：JP2013238578A
公开(公告)日：2013-11-28
申请号：JP2012175787
申请日：2012-08-08
Inventor： OH KWAN-JIE , CHAE YUN-HYOK , KIM BON-GYON , KIM CHE-YON
CPC classification number: H05K1/141 , G01R1/07378 , H05K1/0218 , H05K1/0306 , H05K1/11 , H05K2201/09609
Abstract: PROBLEM TO BE SOLVED: To provide a space transformer for a probe card and a method of manufacturing the same.SOLUTION: There is provided a space transformer for a probe card, including: a substrate having a first surface and a second face facing each other; a plurality of first pads formed on the first surface to be spaced apart from each other and connected to a probe; a plurality of second pads formed on the second surface in positions corresponding to those of the first pads and receiving external electrical signals applied thereto; a plurality of via electrodes penetrating through the substrate and connecting between the first and second pads corresponding to each other; a ground layer formed to cover the second surface and provided with a plurality of second pad exposure holes; and an insulating layer formed to cover the ground layer and the plurality of second pads.
Abstract translation: 要解决的问题：提供一种用于探针卡的空间变压器及其制造方法。解决方案：提供一种用于探针卡的空间变压器，包括：具有第一表面和彼此面对的第二面的基板 ; 多个第一焊盘，形成在所述第一表面上以彼此间隔开并连接到探针; 多个第二焊盘，其形成在与第一焊盘相对应的位置的第二表面上，并且接收施加到其上的外部电信号; 多个通孔电极，穿过基板并连接在彼此对应的第一和第二焊盘之间; 形成为覆盖所述第二表面并设置有多个第二焊盘曝光孔的接地层; 以及形成为覆盖所述接地层和所述多个第二焊盘的绝缘层。
-
公开(公告)号：JP5249132B2
公开(公告)日：2013-07-31
申请号：JP2009134005
申请日：2009-06-03
Applicant: 新光電気工業株式会社
CPC classification number: H01L23/49827 , H01L23/49822 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/00014 , H01L2924/09701 , H01L2924/10253 , H01L2924/15311 , H05K1/0287 , H05K1/0306 , H05K3/4605 , H05K3/4644 , H05K2201/09609 , H05K2201/09945 , H01L2924/00 , H01L2224/0401
Abstract: A wiring board includes a core substrate having a structure including an insulating base material and a large number of filamentous conductors densely provided in the insulating base material and piercing the insulating base material in a thickness direction thereof. Pads made of portions of wiring layers are oppositely disposed on both surfaces of the core substrate and electrically connected to opposite ends of a plurality of filamentous conductors in such a manner that the pads share the filamentous conductors. A wiring connection between one surface side and the other surface side of the core substrate is made through the pads. The insulating base material is made of an inorganic dielectric. Pads made of portions of the wiring layers are disposed on both surfaces of the core substrate and electrically connected only to corresponding one end sides of different groups each formed of a plurality of filamentous conductors.
-
公开(公告)号：JP2010283056A
公开(公告)日：2010-12-16
申请号：JP2009134005
申请日：2009-06-03
Applicant: Shinko Electric Ind Co Ltd , 新光電気工業株式会社
Inventor： HORIUCHI MICHIO , TOKUTAKE YASUE , MATSUDA YUICHI , NAKAZAWA MASAO
CPC classification number: H01L23/49827 , H01L23/49822 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/00014 , H01L2924/09701 , H01L2924/10253 , H01L2924/15311 , H05K1/0287 , H05K1/0306 , H05K3/4605 , H05K3/4644 , H05K2201/09609 , H05K2201/09945 , H01L2924/00 , H01L2224/0401
Abstract: PROBLEM TO BE SOLVED: To reduce the cost by making a core substrate common and to improve flexibility of wiring design by increasing wiring density. SOLUTION: A wiring board 30 includes the core substrate 10 having a structure in which a number of linear conductors 12 are closely provided penetrating an insulating base 11 along its thickness. On both surfaces of the core substrate 10, pads P1, P2 comprising parts of a wiring layer 22 having both ends electrically connected sharing a plurality of linear conductors 12 are arranged opposite each other, and wiring connections with one surface side and the other surface side of the core substrate 10 are formed through the pads. Further, an insulating base 11 is made of an inorganic dielectric, and pads P3, P4 which include parts of wiring layers 22 each electrically connected to only one end side of linear conductors 12 for each group of a plurality of linear conductors 12 are arranged on both surfaces of the core substrate 10. COPYRIGHT: (C)2011,JPO&INPIT
Abstract translation: 要解决的问题：通过使核心基板成为常见来降低成本，并通过增加布线密度来提高布线设计的灵活性。 解决方案：布线板30包括芯基板10，该芯基板10具有沿其厚度穿过绝缘基底11紧密地设置多个线状导体12的结构。 在芯基板10的两表面上，包括具有两端电连接的多个线状导体12的布线层22的部分的焊盘P1，P2彼此相对布置，并且一个表面侧和另一个表面侧的布线连接 通过焊盘形成芯基板10。 此外，绝缘基体11由无机电介质构成，并且包括仅对于多个线性导体12的每组电连接到线性导体12的一端侧的布线层22的部分的焊盘P3，P4布置在 核心基板10的两个表面。版权所有：（C）2011，JPO＆INPIT
-
公开(公告)号：JP4197234B2
公开(公告)日：2008-12-17
申请号：JP2002084164
申请日：2002-03-25
Applicant: 三菱電機株式会社
Inventor： 敏明 渡辺
IPC: H01S5/022 , G02B6/42 , H01L31/0232 , H04B10/2507 , H04B10/40 , H04B10/50 , H04B10/60 , H05K1/02 , H05K1/14 , H05K3/34
CPC classification number: H05K1/141 , G02B6/4201 , G02B6/4246 , H05K1/0219 , H05K1/024 , H05K3/3447 , H05K2201/09609 , H05K2201/09809 , H05K2201/10303 , H05K2201/10371 , H05K2201/10424 , H05K2201/1059
Abstract: One ends of a plurality of interface pins are attached to a substrate in a line. Optical semiconductor device and an electric circuit are mounted on this substrate. The other ends of the interface pins are fit into holes in an another substrate. Signals are exchanged between the two substrates via the interface pins. The interface pins are embedded in a dielectric material. A plurality of ground pins and/or ground through holes may be provided in the dielectric material around the interface pins. The dielectric constant of the dielectric material is less than the dielectric constants of the two substrates.
-
公开(公告)号：JP3774461B2
公开(公告)日：2006-05-17
申请号：JP2004032363
申请日：2004-02-09
Applicant: テッセラ・インコーポレーテッドTessera,Inc.
Inventor： エーレンバーグ、スコット、ジー． , カンドロス、イゴール , グルーベ、ゲイリー、ダブリュ． , ディステファーノ、トーマス、エイチ．
CPC classification number: H05K3/462 , H01L21/4857 , H01L23/5383 , H01L2924/0002 , H01L2924/09701 , H01R12/523 , H05K1/0287 , H05K1/029 , H05K1/0298 , H05K3/4038 , H05K3/4069 , H05K3/4602 , H05K3/4623 , H05K2201/0195 , H05K2201/0305 , H05K2201/09509 , H05K2201/09536 , H05K2201/096 , H05K2201/09609 , H05K2201/09945 , H05K2201/10378 , H05K2201/10666 , H05K2203/175 , H01L2924/00
-
Patent Agency Ranking
公开(公告)号：KR1020170140691A
公开(公告)日：2017-12-21
申请号：KR1020160073355
申请日：2016-06-13
Applicant: 삼성전자주식회사
CPC classification number: H01Q1/243 , H01Q1/38 , H01Q5/35 , H01Q21/28 , H01R12/79 , H01R13/6691 , H05K1/0218 , H05K1/0243 , H05K1/028 , H05K1/115 , H05K1/142 , H05K1/148 , H05K1/18 , H05K7/1427 , H05K2201/09609 , H05K2201/10098
Abstract: 본발명에따른전자장치는하우징; 상기하우징내의인쇄회로기판으로서, 복수개의층을포함하고상기복수개의층은하나이상의전도층과하나이상의절연층을포함하는인쇄회로기판; 상기하우징의적어도한 부분으로형성되거나상기하우징내에배치되는제 1전기부품; 상기하우징내 상기인쇄회로기판상부또는근처에배치되는제 2전기부품으로서, 상기제 1전기부품과분리되는제 2전기부품; 및상기제 1부품으로부터상기제 2부품으로연장하는적어도하나의전기패스로서, 적어도한 부분은상기인쇄회로기판상부또는내부로지나가는전기패스를포함하며, 상기인쇄회로기판은전도성비아들의패턴을포함하는영역을포함하고, 상기각각의비아는상기복수의층들의적어도일부를통하여상기하나이상의도전층들의적어도하나와접촉하고, 상기전기패스는상기전도성비아들과접촉하지않으면서상기영역을통해지나갈수 있다. 이외에도다양한다른실시예들이가능하다.
Abstract translation: 根据本发明的电子设备包括：外壳; 在壳体内的印刷电路板，所述印刷电路板包括多个层，所述多个层包括至少一个导电层和至少一个绝缘层; 由壳体的至少一部分形成或设置在该壳体的至少一部分内的第一电气部件; 布置在所述壳体中的所述印刷电路板上或所述印刷电路板附近的第二电气部件，所述第二电气部件与所述第一电气部件分离; 并且至少一个电路径从第一组件延伸到第二组件，其中至少一个部分包括穿过或进入印刷电路板的电路径，印刷电路板包括导电过孔的图案 其中每个通孔通过多个层中的至少一部分与一个或多个导电层中的至少一个导电层接触，并且如果电通路不接触导电通孔，则电通路能够穿过隔离区 有。 各种其他实施例是可能的。
-
公开(公告)号：KR1020170037348A
公开(公告)日：2017-04-04
申请号：KR1020150136825
申请日：2015-09-25
Applicant: 삼성전기주식회사
CPC classification number: H05K1/0206 , H05K1/0207 , H05K1/115 , H05K3/4038 , H05K3/4602 , H05K3/4644 , H05K2201/0338 , H05K2201/049 , H05K2201/06 , H05K2201/09536 , H05K2201/09609 , H05K2201/09645 , H05K2201/10674
Abstract: 본발명의일 실시예에따른인쇄회로기판은, 코어층, 상기코어층상에적층되는금속층및 상기코어층에두께방향으로관통하여형성되는방열부재를포함한다.
Abstract translation: 根据本发明实施例的印刷电路板包括芯层，堆叠在芯层上的金属层以及沿厚度方向穿透芯层的热辐射构件。
-
公开(公告)号：KR1020160102769A
公开(公告)日：2016-08-31
申请号：KR1020150025269
申请日：2015-02-23
Applicant: 삼성전자주식회사
CPC classification number: H05K1/115 , H05K1/0216 , H05K2201/09609 , H05K2201/09636 , H05K1/0215 , H05K1/0222 , H05K9/0022
Abstract: 본발명의다양한실시예들은전자장치에서발생하는노이즈를감소할수 있는장치에관한것으로, 상기전자장치는인쇄회로기판; 상기인쇄회로기판의표면에실장되며, 적어도하나의신호를생성하는신호생성부; 상기신호생성부의전원단자와상기인쇄회로기판의내부에위치하는메인전원라인을연결하는적어도하나의전원비아; 및상기신호생성부의그라운드단자와상기인쇄회로기판의내부에위치하는메인그라운드를연결하며, 상기전원비아와평행하게위치하는적어도하나의그라운드비아를포함할수 있다.
Abstract translation: 根据本发明的各种实施例，公开了能够减少电子设备中产生的噪声的装置。 电子设备包括：印刷电路板; 信号产生单元，安装在所述印刷电路板的表面上并被配置为产生至少一个信号; 至少一个电源通路，被配置为将所述信号发生单元的电源端子连接到位于所述印刷电路板中的主电源线; 以及至少一个接地通路，被配置为将信号发生单元的接地端子连接到位于印刷电路板中并与电源通路并联设置的主地。
-
公开(公告)号：KR101339493B1
公开(公告)日：2013-12-10
申请号：KR1020120050768
申请日：2012-05-14
Applicant: 삼성전기주식회사
CPC classification number: H05K1/141 , G01R1/07378 , H05K1/0218 , H05K1/0306 , H05K1/11 , H05K2201/09609
Abstract: 본 발명은 서로 대향하는 제1 및 제2 면을 갖는 기판; 상기 제1 면에 서로 이격되어 형성되며, 프로브가 연결되는 복수의 제1 패드; 상기 제2 면 중 상기 제1 패드와 대응되는 위치에 형성되며, 외부로부터 전기적 신호가 인가되는 복수의 제2 패드; 상기 기판을 관통하며, 서로 대응되는 제1 및 제2 패드를 각각 연결하는 복수의 비아전극; 상기 제2 면을 커버하도록 형성되되, 복수의 제2 패드 노출공을 가지는 접지층; 및 상기 접지층과 상기 복수의 제2 패드를 커버하도록 형성된 절연층; 을 포함하는 프로브 카드용 공간 변환기를 제공한다.
-
公开(公告)号：KR1020110003593A
公开(公告)日：2011-01-12
申请号：KR1020107028659
申请日：2004-04-06
Applicant: 이비덴 가부시키가이샤
Inventor： 가토우시노부
IPC: H05K3/46
CPC classification number: H01L23/50 , H01L23/49822 , H01L23/49838 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/16225 , H01L2224/16235 , H01L2924/00014 , H01L2924/01019 , H01L2924/01025 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/15311 , H01L2924/15312 , H01L2924/19106 , H01L2924/3011 , H05K1/0263 , H05K1/115 , H05K3/429 , H05K3/4602 , H05K3/4608 , H05K3/4641 , H05K2201/09309 , H05K2201/09536 , H05K2201/0959 , H05K2201/09609 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
Abstract: 코어기판(30)의 그랜드용스루홀(36E)과 전원용스루홀(36P)이 격자상으로 배설되고, X방향 및 Y방향에서의 유도기전력의 상쇄가 실행되므로, 상호 인덕턴스를 작게 하고, 고주파 IC칩을 실장했다고 해도 오작동이나 에러 등이 발생하는 현상이 없고, 전기특성과 신뢰성을 향상시킬 수 있다.
Abstract translation: 由于大的为通孔（36E）的核心基板30和通孔（36P）的电源被布置在晶格中，X方向和Y方向上的感应电动势的偏移被执行时，较小的互感，高频IC 即使安装芯片，也不会发生故障或错误，并且可以提高电气特性和可靠性。
-
-
-
-
-
-
-
-
-
Search Results
883
records
(took 0.028 seconds)
