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公开(公告)号:CA3143434A1
公开(公告)日:2020-12-24
申请号:CA3143434
申请日:2020-06-19
Applicant: IBM
Inventor: JINKA OBLESH , OLIVADESE SALVATORE BERNARDO , HART SEAN , BRONN NICHOLAS TORLEIV , CHOW JERRY , BRINK MARKUS , GUMANN PATRYK , BOGORIN DANIELA FLORENTINA
IPC: F25D3/10 , F25D31/00 , F28D21/00 , H01L23/367
Abstract: A thermalization structure is formed using a cover configured with a set of pillars, the cover being a part of a cryogenic enclosure of a low temperature device (LTD). A chip including the LTD is configured with a set of cavities, a cavity in the set of cavities having a cavity profile. A pillar from the set of pillars and corresponding to the cavity has a pillar profile such that the pillar profile causes the pillar to couple with the cavity of the cavity profile within a gap tolerance to thermally couple the chip to the cover for heat dissipation in a cryogenic operation of the chip.
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公开(公告)号:GB2528196A
公开(公告)日:2016-01-13
申请号:GB201516760
申请日:2014-01-21
Applicant: IBM
Inventor: CHOW JERRY , GAMBETTA JAY , MERKEL SETH , RIGETTI CHAD TYLER , STEFFEN MATTHIAS
Abstract: A device includes a housing, at least two qubits disposed in the housing and a resonator disposed in the housing and coupled to the at least two qubits, wherein the at least two qubits are maintained at a fixed frequency and are statically coupled to one another via the resonator, wherein energy levels I03> and I12> are closely aligned, where in a tuned microwave signal applied to the qubit activates a two-qubit phase interaction.
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公开(公告)号:AU2022205759A9
公开(公告)日:2025-03-20
申请号:AU2022205759
申请日:2022-01-05
Applicant: IBM
Inventor: CORCOLES-GONZALEZ ANTONIO , GUMANN PATRYK , CHOW JERRY
Abstract: Techniques facilitating multiple cryogenic systems sectioned within a common vacuum space are provided. In one example, a cryostat can comprise a plurality of thermal stages and a thermal switch. The plurality of thermal stages can intervene between a 4-Kelvin (K) stage and a Cold Plate stage. The plurality of thermal stages can include a Still stage and an intermediate thermal stage that can be directly coupled mechanically to the Still stage via a support rod. The thermal switch can be coupled to the intermediate thermal stage and an adjacent thermal stage. The thermal switch can facilitate modifying a thermal profile of the cryostat by providing a switchable thermal path between the intermediate thermal stage and the adjacent thermal stage.
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公开(公告)号:AU2021417412B2
公开(公告)日:2024-12-05
申请号:AU2021417412
申请日:2021-12-30
Applicant: IBM
Inventor: GUMANN PATRYK , GRENDANIN VALERIO , CHOW JERRY
Abstract: Techniques facilitating low thermal conductivity support systems within cryogenic environments are provided. In one example, a cryostat can comprise a support rod and a washer. The support rod can couple first and second thermal stages of the cryostat. The washer can intervene between the support rod and the first thermal stage. The washer can thermally isolate the support rod and the first thermal stage.
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公开(公告)号:BR112021025721A2
公开(公告)日:2022-02-08
申请号:BR112021025721
申请日:2020-06-15
Applicant: IBM
Inventor: CHOW JERRY , ROSENBLATT SAMI
Abstract: fabricação de estruturas de transmon qubit flip-chip para dispositivos de computação quântica. um dispositivo de computação quântica (300) é formado usando um primeiro chip (302) e um segundo chip (306), o primeiro chip tendo um primeiro substrato (303), um primeiro conjunto de blocos (312 a, b) e um conjunto de junções josephson (304) dispostas no primeiro substrato. o segundo chip tem um segundo substrato (307), um segundo conjunto de pads (308) disposto no segundo substrato oposto ao primeiro conjunto de pads e uma segunda camada (310 a, b) formada em um subconjunto do segundo conjunto de pads. a segunda camada é configurada para ligar o primeiro chip e o segundo chip. o subconjunto do segundo conjunto de pads corresponde a um subconjunto do conjunto de junções josephson selecionadas para evitar a colisão de frequência entre qubits em um conjunto de qubits. um qubit é formado usando uma junção josephson do subconjunto de junções josephson e outra junção josephson não no subconjunto tornando-se inutilizável para formar qubits.
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公开(公告)号:AU2020296292A1
公开(公告)日:2021-10-14
申请号:AU2020296292
申请日:2020-06-19
Applicant: IBM
Inventor: JINKA OBLESH , OLIVADESE SALVATORE BERNARDO , HART SEAN , BRONN NICHOLAS TORLEIV , CHOW JERRY , BRINK MARKUS , GUMANN PATRYK , BOGORIN DANIELA FLORENTINA
IPC: F25D19/00 , H01L23/367
Abstract: A thermalization structure is formed using a cover configured with a set of pillars, the cover being a part of a cryogenic enclosure of a low temperature device (LTD). A chip including the LTD is configured with a set of cavities, a cavity in the set of cavities having a cavity profile. A pillar from the set of pillars and corresponding to the cavity has a pillar profile such that the pillar profile causes the pillar to couple with the cavity of the cavity profile within a gap tolerance to thermally couple the chip to the cover for heat dissipation in a cryogenic operation of the chip.
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公开(公告)号:AU2020271227A1
公开(公告)日:2021-10-14
申请号:AU2020271227
申请日:2020-04-06
Applicant: IBM
Inventor: ADIGA VIVEKANANDA , SANDBERG MARTIN , CHOW JERRY , PAIK HANHEE
Abstract: A qubit includes a substrate, and a first capacitor structure having a lower portion formed on a surface of the substrate and at least one first raised portion extending above the surface of the substrate. The qubit further includes a second capacitor structure having a lower portion formed on the surface of the substrate and at least one second raised portion extending above the surface of the substrate. The first capacitor structure and the second capacitor structure are formed of a superconducting material. The qubit further includes a junction between the first capacitor structure and the second capacitor structure. The junction is disposed at a predetermined distance from the surface of the substrate and has a first end in contact with the first raised portion and a second end in contact with the second raised portion.
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公开(公告)号:DE112014001247T5
公开(公告)日:2016-01-21
申请号:DE112014001247
申请日:2014-01-21
Applicant: IBM
Inventor: GAMBETTA JAY , CHOW JERRY , CORCOLES ANTONIO , ABRAHAM DAVID WILLIAM
IPC: H03K19/19
Abstract: Ein System, ein Verfahren und ein Chip zum Steuern von Purcell-Verlust werden beschrieben. Der Chip enthält auf einer ersten Oberfläche des Substrats ausgebildete Qubits. Das Verfahren beinhaltet ein Ermitteln von Frequenzen der Qubits und Steuern einer Trennung zwischen den Frequenzen der Qubits und den Chipmodenfrequenzen des Chips.
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公开(公告)号:GB2526477A
公开(公告)日:2015-11-25
申请号:GB201515685
申请日:2014-01-21
Applicant: IBM
Inventor: ABRAHAM DAVID WILLIAM , GAMBETTA JAY , CHOW JERRY , CORCOLES ANTONIO
IPC: G06N99/00
Abstract: A system, method, and chip to control Purcell loss are described. The chip includes qubits formed on a first surface of a substrate. The method includes determining frequencies of the qubits, and controlling a separation between the frequencies of the qubits and chip mode frequencies of the chip.
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