公开(公告)号：DE102008015696A1

公开(公告)日：2009-10-08

申请号：DE102008015696

申请日：2008-03-26

Applicant: INFINEON TECHNOLOGIES AG

Inventor： THEWES ROLAND ,  BREDERLOW RALF

IPC: G01K7/01

Abstract: The arrangement has two logarithmic units, where each logarithmic unit has an input and an output. A voltage source is connected with the input with a terminal. The voltage source provides an input voltage and has another terminal which is connected with the reference potential. The arrangement has a semiconductor component and an operating point adjusting unit which adjusts an operating point in subliminal voltage area of the input characteristic of the semiconductor component. An independent claim is included for a method for generating a voltage value linearly proportional to the temperature by a semiconductor component.

公开(公告)号：DE102007033051A1

公开(公告)日：2009-01-22

申请号：DE102007033051

申请日：2007-07-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BREDERLOW RALF

IPC: H03K3/023

Abstract: The clock generator circuit (100) has an oscillator (110), which is designed to produce a clock pulse (114) in such a way that the cycle duration of the clock pulse is adjustable by a reference signal (112). A reference signal supplier (120) is provided to adjust the reference signal for the oscillator based on a signal delay in a circuit path. The reference signal supplier has a delay determinator. Independent claims are also included for the following: (1) an integrated circuit (2) a method for providing a clock pulse.

公开(公告)号：DE102007023879A1

公开(公告)日：2008-12-04

申请号：DE102007023879

申请日：2007-05-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： THEWES ROLAND ,  BREDERLOW RALF

IPC: H02M7/217 ,  H02J17/00

Abstract: The rectifier circuit has an alternating voltage connection (W1) and direct voltage connection (G1). The alternating voltage connection is connected with a source-drain-terminal (SD1) of a tunnel-transistor. The direct voltage connection is connected with another source-drain-terminal (SD2) of the tunnel-transistor. A gate-terminal (G) of the tunnel-transistor is connected with another alternating voltage connection (W2). An independent claim is also included for a method for rectifying alternating voltage in direct voltage.

公开(公告)号：DE102004037348A1

公开(公告)日：2006-03-16

申请号：DE102004037348

申请日：2004-08-02

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BREDERLOW RALF ,  HEISS HEINRICH ,  MARTIN ALFRED ,  TIMME HANS-JOERG

IPC: B81B7/00 ,  B01F11/02 ,  B01L3/00 ,  B81C1/00 ,  G01N33/48

Abstract: The invention relates to a fluid transporting device comprising a substrate, a first electroconductive layer applied to the substrate, a piezoelectric layer applied to the first electroconductive layer, a second electroconductive layer applied to the piezoelectric layer, a fluid transporting region along which a supplied fluid can be displaced, and a control unit by which means electrical control signals can be fed to the first electroconductive layer and the second electroconductive layer, said signals enabling the piezoelectric layer to be stimulated in such a way that a force for displacing the fluid along the fluid transport region can be generated on the supplied fluid.

公开(公告)号：DE102004026108A1

公开(公告)日：2005-12-22

申请号：DE102004026108

申请日：2004-05-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KLAUK HAGEN ,  EDER FLORIAN ,  HALIK MARCUS ,  ZSCHIESCHANG UTE ,  BREDERLOW RALF ,  SCHMID GUENTER ,  KRAGLER KARL

IPC: H01L21/02 ,  H01L21/822 ,  H01L27/06 ,  H01L27/08 ,  H01L27/088 ,  H01L27/28 ,  H01L51/00

Abstract: A field effect transistor device (T) is constructed with a source (S), drain (D), intermediate channel (K) and insulated gate (G). A resistance (R) is constructed. This is in contact with the source, drain and/or gate. The resistor is made of 80%-100% of amorphous carbon as a layer or layered structure. Its thickness is preferably 10 nm to 100 nm and it is formed entirely or in part, using cathode beam atomization, chemical gas phase deposition or vaporization. An independent claim is included for the corresponding method of manufacture.

公开(公告)号：DE10248723A1

公开(公告)日：2004-05-06

申请号：DE10248723

申请日：2002-10-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ROESNER WOLFGANG ,  SCHULZ THOMAS ,  HARTWICH JESSICA ,  BREDERLOW RALF ,  PACHA CHRISTIAN

IPC: H01L21/8242 ,  H01L21/84 ,  H01L27/108 ,  H01L27/12

Abstract: An integrated circuit arrangement and method of fabricating the integrated circuit arrangement is described. The integrated circuit arrangement contains an insulating region and a sequence of regions which forms a capacitor. The sequence contains a near electrode region near the insulating region, a dielectric region, and a remote electrode region remote from the insulating region. The insulating region is part of an insulating layer arranged in a plane. The capacitor and an active component are arranged on the same side of the insulating layer and form a memory cell. The near electrode region and an active region of the component are arranged in a plane which lies parallel to the plane in which the insulating layer is arranged. A processor is also contained in the integrated circuit arrangement.

公开(公告)号：DE10206137A1

公开(公告)日：2003-09-04

申请号：DE10206137

申请日：2002-02-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BREDERLOW RALF ,  PACHA CHRISTIAN ,  THEWES ROLAND ,  WEBER WERNER

IPC: G06K19/07 ,  G06K7/08 ,  G06K17/00 ,  G06K19/067 ,  G09F3/00 ,  H04B5/02

Abstract: The invention relates to a label identification system comprised of a transmitting-receiving unit and of identification labels on which the identification information is stored in the form of a digital identification information word. The provision of a circuit on the identification label in the form of a circuit arrangement, which is prefabricated using a polymer technique and on which the identification information is subsequently placed by the offset printing of conductor tracks, enables the provision of an identification label involving a minimal consumption of energy during inexpensive mass production. The bulk of the identification information processing is transferred to the transmitting-receiving unit.

公开(公告)号：DE10145701A1

公开(公告)日：2003-04-10

申请号：DE10145701

申请日：2001-09-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHIENLE MEINRAD ,  THEWES ROLAND ,  PAULUS CHRISTIAN ,  SCHINDLER PETRA ,  JENKER MARTIN ,  BREDERLOW RALF

IPC: G01N21/64 ,  G01N21/78 ,  G01N33/53 ,  G01N33/543 ,  G01N33/58 ,  G01N37/00 ,  G01N33/52 ,  C12Q1/68 ,  G01N33/68

Abstract: The invention relates to a fluorescence biosensor chip and to a fluorescence biosensor chip arrangement. Said fluorescence biosensor chip comprises a substrate, at least one detection device which is arranged in or on the substrate and is used to detect electromagnetic radiation, an optical filter layer which is arranged on the substrate, and an immobilisation layer which is arranged on the optical filter layer and is used to immobilise trap molecules. Said detection device, optical filter layer and immobilisation layer are integrated into the fluorescence biosensor chip. The inventive fluorescence biosensor chip arrangement comprises a fluorescence biosensor chip and an electromagnetic source of radiation.

公开(公告)号：DE10133363A1

公开(公告)日：2003-01-30

申请号：DE10133363

申请日：2001-07-10

Applicant: INFINEON TECHNOLOGIES AG

Inventor： EVERSMANN BJOERN ,  THEWES ROLAND ,  BREDERLOW RALF ,  KOREN IVO ,  PAULUS CHRISTIAN

IPC: G01N27/414 ,  G01N27/416 ,  G01N33/483 ,  G01N37/00 ,  G11C27/02 ,  G01N27/403 ,  G01N33/48

Abstract: The invention relates to a measuring cell for receiving an electric potential of a sample. Said cell has a common substrate for a sensor, which converts a sample into an electric potential and for an amplifier circuit, which is connected to the sensor. The measuring field contains several measuring cells. The measuring cell can also be used to subject a sample to an electric potential, by applying an electric signal to the amplifier circuit.

公开(公告)号：DE10117362A1

公开(公告)日：2002-10-17

申请号：DE10117362

申请日：2001-04-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BREDERLOW RALF

IPC: G06F7/58 ,  G07C15/00

Abstract: The invention relates to a random number generator comprising a number of semi-conductor elements comprising, on average, one electrically active disrupt cell in the frequency band which is important for processing, in the crystalline structure thereof. A suitable transistor is selected by a charge/detector unit and the charge thereof or an alteration of the charge in the electrically active disrupt cell of the selected transistor is determined. A random number is formed from the detected charge or alteration of the charge by means of a random number conversion unit.