公开(公告)号：JP2007209000A

公开(公告)日：2007-08-16

申请号：JP2007041493

申请日：2007-02-21

Applicant: Infineon Technologies Ag ,  インフィネオン テクノロジーズ アクチエンゲゼルシャフト

Inventor： AIGNER ROBERT ,  MARKSTEINER STEPHAN ,  NESSLER WINFRIED ,  ELBRECHT LUEDER ,  TIMME HANS-JOERG

IPC: H03H3/04 ,  H01L41/09 ,  H01L41/18 ,  H01L41/187 ,  H01L41/22 ,  H01L41/253 ,  H03H3/02 ,  H03H9/17

Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a layer having a locally-adapted or predetermined layer thickness characteristics. SOLUTION: (a) At least one layer (7) is formed on a substrate. (b) A removing shape for the formed layer is determined. (c) Irradiation of the upside of the layer, with at least one ion beam (9), is performed at least once so that the layer (7) is locally etched at the place of the ion beam according to the removal characteristics. As a result, the layer having the locally-adapted or predetermined layer thickness characteristic can be formed. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供一种具有局部适应或预定层厚度特性的层的制造方法。 解决方案：（a）在基板上形成至少一层（7）。 （b）确定形成层的去除形状。 （c）至少一个离子束（9）至少进行一次照射该层的上侧，使得根据去除特性在层离子束的位置局部蚀刻层（7）。 结果，可以形成具有局部适应或预定层厚度特性的层。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：WO02095085A8

公开(公告)日：2002-12-19

申请号：PCT/EP0105889

申请日：2001-05-22

Applicant: INFINEON TECHNOLOGIES AG ,  AIGNER ROBERT ,  MARKSTEINER STEPHAN ,  NESSLER WINFRIED ,  ELBRECHT LUEDER ,  TIMME HANS-JOERG

Inventor： AIGNER ROBERT ,  MARKSTEINER STEPHAN ,  NESSLER WINFRIED ,  ELBRECHT LUEDER ,  TIMME HANS-JOERG

IPC: H01L41/22 ,  C23C14/58 ,  C23C16/56 ,  H01C17/24 ,  H01L41/09 ,  H01L41/187 ,  H03H3/04 ,  H01J37/305

CPC classification number: C23C14/5833 ,  C23C14/58 ,  C23C14/5873 ,  C23C16/56 ,  C23F4/00 ,  H01C17/2404 ,  H03H3/04 ,  H03H2003/0414

Abstract: The invention relates to a method for producing a layer with a locally adapted or predefined layer thickness profile. Said method comprises the following steps: a) at least one layer (7) is applied to a substrate, b) a removal profile is determined for the applied layer and c) at least one ion beam (9) is guided over the layer at least once, in such a way that the layer (7) is etched locally at the site of the ion beam, in accordance with the removal profile, thus creating a layer with a locally adapted or predefined layer thickness profile.

Abstract translation: 根据本发明，提供了一种方法，用于与局部适配或预定义的层厚度分布产生层，其包括以下步骤：a）至少一个层被施加到基底上，b）一种去除轮廓被确定为所施加的层（7），和 c）至少一个离子束（9）在层引导至少一次，使得在根据所述去除轮廓在所述离子束的位置的层（7）中，用一种适合局部或预定义的层厚度分布的层的局部蚀刻产生。

公开(公告)号：WO2004019491A3

公开(公告)日：2005-05-06

申请号：PCT/EP0307015

申请日：2003-07-01

Applicant: INFINEON TECHNOLOGIES AG ,  NOKIA CORP ,  ELLAE JUHA SAKARI ,  TIMME HANS-JOERG ,  AIGNER ROBERT ,  MARKSTEINER STEPHAN

Inventor： ELLAE JUHA SAKARI ,  TIMME HANS-JOERG ,  AIGNER ROBERT ,  MARKSTEINER STEPHAN

IPC: H03H7/42 ,  H01F17/00 ,  H03H7/38 ,  H03H9/00 ,  H03H9/58 ,  H03H9/70

CPC classification number: H03H9/0095 ,  H01F17/0006 ,  H01F2021/125 ,  H03H7/42

Abstract: A filter circuit comprising an unsymmetrical gate (202) and a substrate (S). A series circuit consisting of a filter stage (206) and a balancing member (208) is arranged between the symmetrical gate (204) the unsymmetrical gate (202). The balancing member (208) and the filter stage (206) are formed on the substrate (S).

Abstract translation: 一种滤波器电路，包括：一平衡端口（204），不平衡端口（202）和基板（S）。 的串联电路，其包括一个滤波器级（206）和一个Symmetrierbauglied（208）（204）布置在所述平衡端口之间以及所述不平衡端口（202）。 所述Symmetrierbauglied（208）和所述滤波器级（206）（S）形成在衬底上。

公开(公告)号：WO03086956A2

公开(公告)日：2003-10-23

申请号：PCT/EP0302756

申请日：2003-03-17

Applicant: INFINEON TECHNOLOGIES AG ,  DAECHE FRANK ,  TIMME HANS-JOERG

Inventor： DAECHE FRANK ,  TIMME HANS-JOERG

IPC: B81B7/00

CPC classification number: B81C1/00333 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention relates to a method for producing a housing, whereby a base comprising first contacts is provided with a layer which can be photolithographically structured in such a way as to uncover the contacts. A chip which has a micromechanical structure located between second contacts on said chip is provided with a layer which can be photolithographically structured in such a way as to create a recess in the region of the micromechanical structure and in the region of the second contacts. Once the base and the chip have been joined, the base is etched off.

Abstract translation: 在与第一接触元件的底板的情况下的制造方法具备光刻图案化层，其被图案化以暴露接触元件。 与微机械结构，其位于所述第二接触元件的芯片上之间的芯片上设置有光刻图案化层，其被图案化在微机械结构的区域中并且在所述第二接触元件的区域以创建一个凹部。 连接基部和底座通过蚀刻除去所述芯片之后。

公开(公告)号：DE102014106132A1

公开(公告)日：2014-11-06

申请号：DE102014106132

申请日：2014-04-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： EDER HANNES ,  ENGELHARDT MANFRED ,  ESCHER-POEPPEL IRMGARD ,  FUERGUT EDWARD ,  TIMME HANS-JOERG

IPC: H01L21/306 ,  H01L21/301 ,  H01L21/56

Abstract: Ein Verfahren zur Verarbeitung einer Mehrzahl von gehäusten elektronischen Chips, die in einem gemeinsamen Substrat miteinander verbunden sind, wird vorgesehen, wobei das Verfahren umfasst: Ätzen der elektronischen Chips, Detektieren von Informationen, welche eine wenigstens teilweise Entfernung einer Indikatorstruktur nach einer Freilegung der Indikatorstruktur anzeigen, die innerhalb wenigstens eines Teils der elektronischen Chips eingebettet ist und freigelegt wird, nachdem das Ätzen Chipmaterial über der Indikatorstruktur entfernt hat, und Einstellen der Verarbeitung beim Detektieren der Informationen, welche die wenigstens teilweise Entfernung der Indikatorstruktur anzeigen.

公开(公告)号：DE50202672D1

公开(公告)日：2005-05-04

申请号：DE50202672

申请日：2002-11-22

Applicant: INFINEON TECHNOLOGIES AG

Inventor： AIGNER ROBERT ,  ELBRECHT LUEDER ,  HANDTMANN MARTIN ,  MARKSTEINER STEPHAN ,  NESSLER WINFRIED ,  TIMME HANS-JOERG

IPC: H03H3/04 ,  H03H9/17

Abstract: In a method for manufacturing a piezoelectric oscillating circuit in thin film technology, wherein the oscillating circuit includes a predetermined natural frequency and a plurality of layers, first of all at least a first layer of the piezoelectric oscillating circuit is generated. Subsequently, by processing the first layer a frequency correction is performed. Subsequently, at least a second layer of the piezoelectric oscillating circuit is generated and processed for performing a second frequency correction.

公开(公告)号：DE69630501D1

公开(公告)日：2003-12-04

申请号：DE69630501

申请日：1996-08-09

Applicant: INFINEON TECHNOLOGIES AG ,  IBM ,  TOSHIBA KK

Inventor： HASEGAWA ISAHIRO ,  MULLER KARL PAUL ,  POSCHENRIEDER BERNHARD L ,  TIMME HANS-JOERG ,  VAN KESSEL THEODORE

IPC: C23C16/52 ,  H01L21/00 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/683 ,  H01L35/28

Abstract: A temperature control apparatus for single wafer etching tools comprising a cathode electrode, an isolation layer, and chuck means, respectfully, which are vertically stacked to support a wafer to be etched. A layer of thermoelectric elements is disposed between the isolation layer and the chuck means. The layer of thermoelectric elements comprises a center area closed loop of connected Peltier elements and an outer area closed loop of connected Peltier elements. The center area closed loop is coupled to a power source and is arranged to correspond to the center area of the wafer. The outer area closed loop is coupled to a power source and is arranged to correspond to the outer area of the wafer. Accordingly, the temperatures associated with each of the specific areas of the wafer are individually controlled by one of the closed loops.

公开(公告)号：DE10234686A1

公开(公告)日：2003-09-11

申请号：DE10234686

申请日：2002-07-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HANDTMANN MARTIN ,  TIMME HANS-JOERG ,  AIGNER ROBERT

IPC: H03H7/42 ,  H03H9/00 ,  H03H9/64 ,  H03H9/25

公开(公告)号：DE10130084A1

公开(公告)日：2003-01-16

申请号：DE10130084

申请日：2001-06-21

Applicant: INFINEON TECHNOLOGIES AG ,  NOKIA MOBILE PHONES LTD

Inventor： ELLA JUHA ,  TIMME HANS-JOERG ,  AIGNER ROBERT ,  TIKKA PASI

IPC: H03H9/05 ,  H03H9/10 ,  H03H3/08

Abstract: The method involves connecting the chip(s) (10) of the device to a bearer (20), so that an active element(s) (12) of the device on the chip is opposite the bearer with an intermediate space between them, and applying a protective cover (28) to the housing of the chip with the active element between the cover and the bearer, whereby the intermediate space is retained. AN Independent claim is also included for the following: a housing with a surface acoustic wave or SAW or a bulk acoustic wave or BAW device within it.

公开(公告)号：DE102010000904A1

公开(公告)日：2010-08-12

申请号：DE102010000904

申请日：2010-01-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： POEPPEL GERHARD ,  ROBL WERNER ,  TIMME HANS-JOERG

IPC: H01L29/82

Abstract: Gemäß einem Ausführungsbeispiel der vorliegenden Erfindung umfasst ein Spin-Bauelement eine Zwischenhalbleiterregion, die zwischen einem ersten Anschluss und einem zweiten Anschluss angeordnet ist, wobei der erste Anschluss angepasst ist, um einen Strom mit einem ersten Grad einer Spin-Polarisation an die Zwischenhalbleiterregion zu liefern, und wobei der zweite Anschluss angepasst ist, um den Strom mit einem zweiten Grad einer Spin-Polarisation auszugeben. Das Spin-Bauelement umfasst ferner eine spinselektive Streustruktur, die an die Zwischenhalbleiterregion angrenzt, wobei die spinselektive Streustruktur derart angepasst ist, dass der erste Grad einer Spin-Polarisation zu dem zweiten Grad verändert wird, wobei die spinselektive Streustruktur eine Steuerelektrode aufweist, die elektrisch von der Zwischenhalbleiterregion isoliert ist, und wobei die Steuerelektrode angepasst ist, um ein elektrisches Feld, das senkrecht zu einer Richtung des Stroms durch die Zwischenhalbleiterregion ist, anzulegen, um einen Betrag des Stroms zu steuern.