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    24.
    发明专利
    未知

    公开(公告)号：DE10344872A1

    公开(公告)日：2005-05-19

    申请号：DE10344872

    申请日：2003-09-26

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： FISCHER HELMUT ,  LINDOLF JUERGEN ,  SOMMER MICHAEL BERNHARD

    IPC: H01L27/02 ,  H03K19/003 ,  H01L23/60 ,  H01L27/085 ,  H02H9/04

    Abstract: An integrated circuit with electrostatic discharge protection includes a first transistor with a source terminal, a drain terminal and a gate terminal, and a second transistor with a source terminal, a drain terminal and a gate terminal. The gate terminal for each of the first and second transistors is connected to the drain terminal. The first transistor is connected in series with the second transistor by one of the drain and source terminals of the first transistor being connected to one of the drain and source terminals of the second transistor. The series circuit formed by the transistors is connected to an input terminal of the integrated circuit or to a supply terminal and a terminal that applies the reference potential of the integrated circuit. The series circuit of the transistors is dimensioned by the number of transistors and the setting of the channel length and channel width ratios of the transistors.

    25.
    发明专利
    未知

    公开(公告)号：DE10254160A1

    公开(公告)日：2004-06-09

    申请号：DE10254160

    申请日：2002-11-20

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： KOWALSKI BERNHARD ,  FELBER ANDREAS ,  ROSSKOPF VALENTIN ,  SCHLOESSER TILL ,  LINDOLF JUERGEN

    IPC: H01L21/8242 ,  H01L27/02 ,  H01L27/108 ,  H01L29/94 ,  G11C11/40

    Abstract: A transistor array has vertical FET transistors each connected to a storage capacitor of a memory cell array. Gate electrode strips, which form word lines, of the transistors are located on both sides of active webs running parallel to one another and are connected to a superimposed metal plane by word line or CS contacts. To insulate these word line contacts from the other elements of the transistor array and of the cell array, the word line contacts are located in deep trenches that are introduced into the webs.

    28.
    发明专利
    未知

    公开(公告)号：DE10032236C2

    公开(公告)日：2002-05-16

    申请号：DE10032236

    申请日：2000-07-03

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： BRASS ECKHARD ,  LE THOAI-THAI ,  LINDOLF JUERGEN ,  SCHNABEL JOACHIM

    IPC: G11C11/409 ,  G11C5/14 ,  G11C7/06 ,  G11C7/22 ,  G11C11/403 ,  G11C11/406 ,  G11C11/407 ,  G11C11/4074 ,  H03K19/0175 ,  G06F1/32

    Abstract: The circuit generates a control voltage derived from a reference current per differential amplifier acting as a receiver to set the correct operating point. Switching elements for each receiver in a line carrying a current for generating the control voltage are permanently closed in working mode by a trigger signal (EN) to continuously deliver the current and are closed periodically or at discrete times in standby mode by a refresh signal. The circuit generates a control voltage derived from a reference current (IREF) for each differential amplifier (6,7) functioning as a receiver to set the correct operating point. It has switching elements (10-12) for each receiver in a line (13) carrying a current for generating the control voltage and that are permanently closed in working mode by a trigger signal (EN) to continuously deliver the current and that are closed periodically or at discrete times in standby mode by a refresh signal (SRF). Independent claims are also included for the following: a DRAM memory.

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