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    INTERCONNECT STRUCTURE AND METHOD OF FABRICATION OF SAME
    22.
    发明申请
    INTERCONNECT STRUCTURE AND METHOD OF FABRICATION OF SAME 审中-公开
    互连结构及其制造方法

    公开(公告)号：WO2006113186A3

    公开(公告)日：2008-07-24

    申请号：PCT/US2006013179

    申请日：2006-04-07

    Applicant: IBM ,  YANG CHIH-CHAO ,  CLEVENGER LAWRENCE A ,  COWLEY ANDREW P ,  DALTON TIMOTHY J ,  YOON MEEYOUNG H

    Inventor： YANG CHIH-CHAO ,  CLEVENGER LAWRENCE A ,  COWLEY ANDREW P ,  DALTON TIMOTHY J ,  YOON MEEYOUNG H

    IPC: H01L21/4763

    CPC classification number: H01L21/76849 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/76831 ,  H01L21/76843 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A damascene wire and method of forming the wire. The method including: forming a mask layer on a top surface of a dielectric layer; forming an opening in the mask layer; forming a trench in the dielectric layer where the dielectric layer is not protected by the mask layer; recessing the sidewalls of the trench under the mask layer; forming a conformal conductive liner on all exposed surface of the trench and the mask layer; filling the trench with a core electrical conductor; removing portions of the conductive liner extending above the top surface of the dielectric layer and removing the mask layer; and forming a conductive cap on a top surface of the core conductor. The structure includes a core conductor clad in a conductive liner and a conductive capping layer in contact with the top surface of the core conductor that is not covered by the conductive liner.

    Abstract translation: 一种镶嵌线及其形成方法。 该方法包括：在电介质层的顶表面上形成掩模层; 在掩模层中形成开口; 在电介质层中形成沟槽，其中电介质层不被掩模层保护; 使掩模层下方的沟槽的侧壁凹陷; 在沟槽和掩模层的所有暴露表面上形成共形导电衬垫; 用芯电导体填充沟槽; 去除在电介质层的顶表面上方延伸的导电衬垫的部分，并去除掩模层; 以及在所述芯导体的顶表面上形成导电帽。 该结构包括包覆在导电衬垫中的芯导体和与未被导电衬垫覆盖的芯导体的顶表面接触的导电覆盖层。

    MICRO-CAVITY MEMS DEVICE AND METHOD OF FABRICATING SAME
    23.
    发明申请
    MICRO-CAVITY MEMS DEVICE AND METHOD OF FABRICATING SAME 审中-公开
    微孔MEMS器件及其制造方法

    公开(公告)号：WO2007027813A3

    公开(公告)日：2007-12-06

    申请号：PCT/US2006033924

    申请日：2006-08-30

    Applicant: IBM ,  HSU LOUIS C ,  CLEVENGER LAWRENCE A ,  DALTON TIMOTHY J ,  RADENS CARL J ,  WONG KEITH KWONG HON ,  YANG CHIH-CHAO

    Inventor： HSU LOUIS C ,  CLEVENGER LAWRENCE A ,  DALTON TIMOTHY J ,  RADENS CARL J ,  WONG KEITH KWONG HON ,  YANG CHIH-CHAO

    IPC: H01P1/10

    CPC classification number: H01H50/005 ,  H01H2050/007 ,  Y10T29/4902 ,  Y10T29/49105 ,  Y10T29/49147

    Abstract: A MEM switch is described having a free moving element (140) within in micro-cavity (40), and guided by at least one inductive element. The switch consists of an upper inductive coil (170); an optional lower inductive coil (190), each having a metallic core (180,200) preferably made of permalloy; a micro-cavity (40); and a free-moving switching element (140) also made of magnetic material. Switching is achieved by passing a current through the upper coil, inducing a magnetic field in the coil element. The magnetic field attracts the free-moving magnetic element upwards, shorting two open wires (M_I M_r) and thus, closing the switch. When the current flow stops or is reversed, the free-moving magnetic element drops back by gravity to the bottom of the micro-cavity and the wires open. When gravity cannot be used, a lower coil becomes necessary to pull the free-moving switching element back and holding it at its original position.

    Abstract translation: 描述了一种MEM开关，其具有在微腔（40）内的自由移动元件（140），并由至少一个电感元件引导。 开关由上部感应线圈（170）组成; 可选的下感应线圈（190），每个具有优选由坡莫合金制成的金属芯（180,200） 微腔（40）; 以及也由磁性材料制成的自由移动的开关元件（140）。 通过使电流通过上部线圈来实现切换，从而在线圈元件中产生磁场。 磁场向上吸引自由移动的磁性元件，使两根开放的导线（M_I M_r）短路，从而闭合开关。 当电流停止或反转时，自由移动的磁性元件通过重力返回到微腔的底部并且电线打开。 当不能使用重力时，需要下部线圈将自由移动的开关元件拉回并将其保持在其原始位置。

    24.
    发明专利
    未知

    公开(公告)号：DE60224836T2

    公开(公告)日：2009-01-08

    申请号：DE60224836

    申请日：2002-11-07

    Applicant: IBM

    Inventor： VOLANT RICHARD P ,  BISSON JOHN C ,  COTE DONNA R ,  DALTON TIMOTHY J ,  GROVES ROBERT A ,  PETRARCA KEVIN S ,  STEIN KENNETH J ,  SUBBANNA SESHADRI

    IPC: B81C1/00 ,  B81B3/00 ,  H01H49/00 ,  H01H59/00

    Abstract: A method of fabricating micro-electromechanical switches (MEMS) integrated with conventional semiconductor interconnect levels, using compatible processes and materials is described. The method is based upon fabricating a capacitive switch that is easily modified to produce various configurations for contact switching and any number of metal-dielectric-metal switches. The process starts with a copper damascene interconnect layer, made of metal conductors inlaid in a dielectric. All or portions of the copper interconnects are recessed to a degree sufficient to provide a capacitive air gap when the switch is in the closed state, as well as provide space for a protective layer of, e.g., Ta/TaN. The metal structures defined within the area specified for the switch act as actuator electrodes to pull down the movable beam and provide one or more paths for the switched signal to traverse. The advantage of an air gap is that air is not subject to charge storage or trapping that can cause reliability and voltage drift problems. Instead of recessing the electrodes to provide a gap, one may just add dielectric on or around the electrode. The next layer is another dielectric layer which is deposited to the desired thickness of the gap formed between the lower electrodes and the moveable beam that forms the switching device. Vias are fabricated through this dielectric to provide connections between the metal interconnect layer and the next metal layer which will also contain the switchable beam. The via layer is then patterned and etched to provide a cavity area which contains the lower activation electrodes as well as the signal paths. The cavity is then back-filled with a sacrificial release material. This release material is then planarized with the top of the dielectric, thereby providing a planar surface upon which the beam layer is constructed.

    25.
    发明专利
    未知

    公开(公告)号：DE60224836D1

    公开(公告)日：2008-03-13

    申请号：DE60224836

    申请日：2002-11-07

    Applicant: IBM

    Inventor： VOLANT RICHARD P ,  BISSON JOHN C ,  COTE DONNA R ,  DALTON TIMOTHY J ,  GROVES ROBERT A ,  PETRARCA KEVIN S ,  STEIN KENNETH J ,  SUBBANNA SESHADRI

    IPC: B81C1/00 ,  B81B3/00 ,  H01H49/00 ,  H01H59/00

    Abstract: A method of fabricating micro-electromechanical switches (MEMS) integrated with conventional semiconductor interconnect levels, using compatible processes and materials is described. The method is based upon fabricating a capacitive switch that is easily modified to produce various configurations for contact switching and any number of metal-dielectric-metal switches. The process starts with a copper damascene interconnect layer, made of metal conductors inlaid in a dielectric. All or portions of the copper interconnects are recessed to a degree sufficient to provide a capacitive air gap when the switch is in the closed state, as well as provide space for a protective layer of, e.g., Ta/TaN. The metal structures defined within the area specified for the switch act as actuator electrodes to pull down the movable beam and provide one or more paths for the switched signal to traverse. The advantage of an air gap is that air is not subject to charge storage or trapping that can cause reliability and voltage drift problems. Instead of recessing the electrodes to provide a gap, one may just add dielectric on or around the electrode. The next layer is another dielectric layer which is deposited to the desired thickness of the gap formed between the lower electrodes and the moveable beam that forms the switching device. Vias are fabricated through this dielectric to provide connections between the metal interconnect layer and the next metal layer which will also contain the switchable beam. The via layer is then patterned and etched to provide a cavity area which contains the lower activation electrodes as well as the signal paths. The cavity is then back-filled with a sacrificial release material. This release material is then planarized with the top of the dielectric, thereby providing a planar surface upon which the beam layer is constructed.

    MIM CAPACITOR AND METHOD OF FABRICATING SAME
    28.
    发明申请
    MIM CAPACITOR AND METHOD OF FABRICATING SAME 审中-公开
    MIM电容器及其制造方法

    公开(公告)号：WO2006113158A3

    公开(公告)日：2007-03-01

    申请号：PCT/US2006012904

    申请日：2006-04-07

    Applicant: IBM ,  YANG CHIH-CHANO ,  CLEVENGER LAWRENCE A ,  DALTON TIMOTHY J ,  HSU LOUIS C

    Inventor： YANG CHIH-CHANO ,  CLEVENGER LAWRENCE A ,  DALTON TIMOTHY J ,  HSU LOUIS C

    IPC: H01L21/8242 ,  H01L21/20

    CPC classification number: H01L23/5223 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A damascene MIM capacitor and a method of fabricating the MIM capacitor. The MIM capacitor includes a dielectric layer (140) having top and bottom surfaces; a trench in the dielectric layer, the trench extending from the top surface to the bottom surface of the dielectric layer (140); a first plate of a MIM capacitor comprising a conformal conductive liner (175) formed on all sidewalls and extending along a bottom of the trench, the bottom of the trench coplanar with the bottom surface of the dielectric layer; an insulating layer (190) formed over a top surface of the conformal conductive liner; and a second plate (195) of the MIM capacitor comprising a core conductor in direct physical contact with the insulating layer, the core conductor filling spaces in the trench not filled by the conformal conductive liner and the insulating layer. The method includes forming portions of the MIM capacitor simultaneously with damascene interconnection wires.

    Abstract translation: 一种镶嵌MIM电容器和一种制造MIM电容器的方法。 MIM电容器包括具有顶表面和底表面的电介质层（140） 所述电介质层中的沟槽，所述沟槽从所述介电层（140）的顶表面延伸到所述底表面; MIM电容器的第一板包括形成在所有侧壁上并沿着沟槽的底部延伸的共形导电衬垫（175），沟槽的底部与电介质层的底表面共面; 绝缘层（190），形成在所述共形导电衬垫的顶表面上; 和MIM电容器的第二板（195），其包括与所述绝缘层直接物理接触的芯导体，所述沟槽中的所述芯导体填充空间未被所述共形导电衬垫和所述绝缘层填充。 该方法包括与镶嵌互连线同时形成MIM电容器的一部分。

    METHOD OF FABRICATING MICRO-ELECTROMECHANICAL SWITCHES ON CMOS COMPATIBLE SUBSTRATES
    29.
    发明专利
    METHOD OF FABRICATING MICRO-ELECTROMECHANICAL SWITCHES ON CMOS COMPATIBLE SUBSTRATES 未知

    公开(公告)号：AU2002365158A1

    公开(公告)日：2003-07-09

    申请号：AU2002365158

    申请日：2002-11-07

    Applicant: IBM

    Inventor： PETRARCA KEVIN S ,  STEIN KENNETH J ,  SUBBANNA SESHADRI ,  VOLANT RICHARD P ,  BISSON JOHN C ,  COTE DONNA R ,  DALTON TIMOTHY J ,  GROVES ROBERT A

    IPC: B81B3/00 ,  B81C1/00 ,  H01H49/00 ,  H01H59/00 ,  H01L21/20

    Abstract: A method of fabricating micro-electromechanical switches (MEMS) integrated with conventional semiconductor interconnect levels, using compatible processes and materials is described. The method is based upon fabricating a capacitive switch that is easily modified to produce various configurations for contact switching and any number of metal-dielectric-metal switches. The process starts with a copper damascene interconnect layer, made of metal conductors inlaid in a dielectric. All or portions of the copper interconnects are recessed to a degree sufficient to provide a capacitive air gap when the switch is in the closed state, as well as provide space for a protective layer of, e.g., Ta/TaN. The metal structures defined within the area specified for the switch act as actuator electrodes to pull down the movable beam and provide one or more paths for the switched signal to traverse. The advantage of an air gap is that air is not subject to charge storage or trapping that can cause reliability and voltage drift problems. Instead of recessing the electrodes to provide a gap, one may just add dielectric on or around the electrode. The next layer is another dielectric layer which is deposited to the desired thickness of the gap formed between the lower electrodes and the moveable beam that forms the switching device. Vias are fabricated through this dielectric to provide connections between the metal interconnect layer and the next metal layer which will also contain the switchable beam. The via layer is then patterned and etched to provide a cavity area which contains the lower activation electrodes as well as the signal paths. The cavity is then back-filled with a sacrificial release material. This release material is then planarized with the top of the dielectric, thereby providing a planar surface upon which the beam layer is constructed.

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