公开(公告)号：DE19947053C1

公开(公告)日：2001-05-23

申请号：DE19947053

申请日：1999-09-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHREMS MARTIN ,  DRESCHER DIRK ,  WURZER HELMUT ,  KARCHER WOLFRAM

IPC: H01L21/8242 ,  H01L27/108

Abstract: Trench capacitor comprises: trench (108) having an upper region (109) and a lower region (111) formed in substrate (101); insulating collar (168) formed in upper region of trench; trenched sink (170) formed in the substrate and partially penetrating lower region of trench; a dielectric layer (164) made of tungsten oxide as capacitor dielectric; and a conducting trench filling (161) in the trench. An Independent claim is also included for a process for the production of the trench capacitor. Preferred Features: The conducting trench filling is made of a tungsten-containing material. A barrier layer made of silicon oxide, oxynitride, tungsten nitride, titanium nitride or tantalum nitride is arranged between the dielectric layer and the substrate.

公开(公告)号：DE19944012B4

公开(公告)日：2007-07-19

申请号：DE19944012

申请日：1999-09-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHREMS MARTIN

IPC: H01L27/108 ,  H01L21/8242

Abstract: A trench capacitor for use in a semiconductor memory cell is formed in a substrate. The trench capacitor includes a trench having an upper region and a lower region, an insulation collar formed in the upper region on a trench wall of the trench, and a buried well, through which the lower region of the trench at least partly extends. The trench capacitor further includes, as an outer capacitor electrode, a conductive layer lining the lower region of the trench and the insulation collar, a dielectric layer lining the conductive layer, and a conductive trench filling which is filled into the trench as an inner capacitor electrode. A method of fabricating a trench capacitor is also provided.

公开(公告)号：DE19941148B4

公开(公告)日：2006-08-10

申请号：DE19941148

申请日：1999-08-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： TEMMLER DIETMAR ,  BENZINGER HERBERT ,  KARCHER WOLFRAM ,  PUSCH CATHARINA ,  SCHREMS MARTIN ,  FAUL JUERGEN

IPC: H01L27/108 ,  H01L21/8242

Abstract: A memory having a memory cell formed in a substrate and including a trench capacitor and a transistor and a method for producing the memory includes connecting the trench capacitor to the transistor with a self-aligned connection. The transistor at least partly covers the trench capacitor. The trench capacitor is filled with a conductive trench filling and an insulating covering layer is situated on the conductive trench filling. An epitaxial layer is situated above the insulating covering layer. The transistor is formed in the epitaxial layer. The self-aligned connection is formed in a contact trench and includes an insulation collar in which a conductive material is introduced. A conductive cap is formed on the conductive material.

公开(公告)号：DE10137370C1

公开(公告)日：2003-01-30

申请号：DE10137370

申请日：2001-07-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHREMS MARTIN ,  KOEHLER DANIEL ,  LORENZ BARBARA ,  KRASEMANN ANKE ,  SCHUPKE KIRSTIN

IPC: H01L21/762 ,  H01L21/8242

Abstract: Production of a side wall spacer in a trench (2) etched in a substrate (1) using an etching mask comprises: depositing a dielectric layer (5) thickly on the etching mask and thinly on the base of the trench; isotropically back etching the deposited layer; and anisotropically etching the back-etched layer. Preferred Features: Isotropic back etching is carried out using a wet chemical or a dry chemical method. Anisotropic etching is carried out by reactive ion etching.

公开(公告)号：DE10113187C1

公开(公告)日：2002-08-29

申请号：DE10113187

申请日：2001-03-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHREMS MARTIN

IPC: H01L21/8242 ,  H01L27/108

Abstract: A trench is formed in a substrate with an upper region and a lower region. The trench is subsequently widened in its upper region and in its lower region by isotropic etching. In the upper region, an insulating collar is formed that is designated as a buried insulating collar due to the widened trench. The insulating collar is removed in the vicinity of the surface of the substrate, through which the substrate is exposed in this region. Here, a selective epitaxial layer is subsequently grown in the trench, through which a subsequently formed selection transistor can be formed in perpendicular fashion over the trench, or very close to the trench. In addition, through the widened trench the electrode surface of the capacitor electrodes is enlarged, which ensures an increased storage capacity.

公开(公告)号：DE19842665C2

公开(公告)日：2001-10-11

申请号：DE19842665

申请日：1998-09-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHREMS MARTIN ,  ARNOLD NORBERT

IPC: H01L21/316 ,  H01L21/8242

Abstract: Manufacture of a trench capacitor comprises using an insulation collar (168), requires initially preparing a substrate (101) followed by forming a trench (108) in the substrate. A first layer (177) is then provided on the trench wall, and a second layer (178) is provided on the first layer. The trench is filled with a first filler material (152), the latter material then being removed from the top region of the trench to form the collar zone, and then the second layer is removed from the top region of the trench, followed by removing the first filler material from the bottom of the trench. The first layer is then removed from the top region of the trench (108) prior to local oxidation of the top region of the trench in order to create the insulation collar (168). The first and second layers are then removed from the bottom region of the trench, and a dielectric layer (164) is formed in the lower region of the trench and on the inner face of the insulation collar (168). The trench is then filled with a conducting second filler material (161).

公开(公告)号：DE19939589A1

公开(公告)日：2001-05-10

申请号：DE19939589

申请日：1999-08-20

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HENNECKE SABINE ,  SCHREMS MARTIN

IPC: H01L21/8242 ,  H01L27/108 ,  H01L21/762

Abstract: A method for forming a trench with a buried plate includes the steps of forming a trench in a substrate, depositing a non-doped silicate oxide in the trench and placing a doped silicate glass filling thereon. A buried trench plate is formed around the lower region of the trench in the substrate.

公开(公告)号：DE19944011A1

公开(公告)日：2001-03-22

申请号：DE19944011

申请日：1999-09-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHREMS MARTIN ,  GERNHARDT STEFAN ,  MORHARD KLAUS-DIETER ,  STEGEMANN MAIK

IPC: H01L21/8242 ,  H01L27/108

Abstract: The invention relates to a method for producing a memory, comprising the following steps: formation of a trench (108) in a substrate (101), formation of an isolation collar (168) in the trench (108), formation of a dielectric layer (164) in the trench (108), filling of the trench (108) with a conductive trench-fill agent (161) and formation of a transistor (110). In order to form a trench isolation (180) once the trench (108) has been filled with the conductive trench-fill agent (161), a trench cover dielectric (430) is also formed in the trench (108) and said trench cover dielectric (430) is used as an etching mask during the formation of the trench isolation (180), in such a way that said trench isolation (180) is formed in a self-aligning manner, in relation to the trench (108). As a result of this self-aligned production of the trench isolation (180), the position of the same (180) is to a great extent independent of the alignment accuracy of the photo-exposure means.