32.
    发明专利
    未知

    公开(公告)号:DE19945140A1

    公开(公告)日:2001-04-12

    申请号:DE19945140

    申请日:1999-09-21

    Abstract: The invention relates to a method for producing a mask layer having openings with reduced widths. An organic resist layer (3) is produced over the semiconductor substrate and is lithographically structured, whereby a resist opening (4) is produced in the resist layer (3). A polymer film (5) is deposited on the structured resist layer (3). Said film covers the side walls and the bottom (6) of the resist opening (4). The polymer film (5) is removed from the bottom (6) of the resist opening (4) by means of anisotropic etching.

    37.
    发明专利
    未知

    公开(公告)号:DE10027932C2

    公开(公告)日:2003-10-02

    申请号:DE10027932

    申请日:2000-05-31

    Abstract: A method for etching an insulating layer of an electronic or microelectronic component uses a catalyst that is present during the etching. The method is in particular used for etching oxides. The catalyst may be added in a gaseous form and/or as an intermediate layer in the component. A component having structures etched in a dielectric material, in which traces of an etching catalyst are detectable in and/or around a contact hole and/or the structures is also provided.

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