4.
    发明专利
    未知

    公开(公告)号:DE10121179B4

    公开(公告)日:2005-12-22

    申请号:DE10121179

    申请日:2001-04-30

    Abstract: Imaging errors in optical exposure units for the lithographic structuring of semiconductors are determined. First, a latent image of a mask is first produced in a photoactivatable layer by exposure using the optical exposure unit to be tested. After heat treating for increasing the contrast and developing the exposed resist, the latter is treated with an amplification agent which preferably diffuses into the exposed parts of the photoresist. There, it reacts with groups of the photoresist. This leads to an increase in the layer thickness of the resist in the exposed parts. A topographical image of the surface of the photoresist, which can be created, for example, by scanning electron microscopy, then indicates imaging errors by protuberances which are located outside the image of the mask. The method permits testing of optical exposure units under production conditions and thus facilitates the adjustment and the checking of all components of the exposure system used for the production of microchips.

    5.
    发明专利
    未知

    公开(公告)号:DE10121178B4

    公开(公告)日:2005-12-01

    申请号:DE10121178

    申请日:2001-04-30

    Abstract: The method enables determining imaging errors of photomasks for the lithographic structuring of semiconductors. A latent image of the mask is first produced in a photoactivatable layer by exposure. After heat treatment carried out for increasing the contrast and development of the exposed resist, the latter is treated with an amplification agent which preferably diffuses into the exposed parts of the photoresist. There, it reacts with groups of the photoresist, which leads to an increase in the layer thickness of the resist in the exposed parts. A topographical image of the surface of the photoresist, which can be created, for example, by scanning electron microscopy, then indicates imaging errors by protuberances which are located outside the image of the mask. The mask layout can be tested under production conditions and the adjustment and the checking of all components of the phototransfer system used for the production of microchips is facilitated.

    7.
    发明专利
    未知

    公开(公告)号:DE50000341D1

    公开(公告)日:2002-09-05

    申请号:DE50000341

    申请日:2000-02-01

    Abstract: A storage cell configuration including magnetoresistive storage elements located in a cell field between first lines and second lines. A first metalization plane, a second metalization plane and contacts connecting the first metalization plane to the second metalization plane are provided in a periphery. The first lines and the first metalization plane and the second lines and the contacts are disposed on the same plane respectively so that they can be produced by structuring one conductive layer respectively.

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