公开(公告)号：KR100975523B1

公开(公告)日：2010-08-13

申请号：KR1020030100494

申请日：2003-12-30

Applicant: 삼성전자주식회사

Inventor： 권장연 ,  타카시노구치 ,  박영수 ,  김도영

IPC: H01L29/786

CPC classification number: H01L29/78696 ,  H01L21/02532 ,  H01L21/02686 ,  H01L21/2026 ,  H01L27/1285 ,  H01L27/1296 ,  H01L29/04 ,  H01L29/1029 ,  H01L29/6675 ,  H01L29/78663 ,  H01L29/78672

Abstract: 활성영역이 고이동도영역과 저이동도영역으로 정의된 반도체 소자 및 이를 적용하는 박막트랜지스트에 관해 개시한다. 이동도를 소자의 요구를 만족하는 수준으로 낮추고, 이동도의 감소에 따른 반도체 소자간의 이동도의 편차를 감소시킨다. 이러한 이동도의 편차 감소는 대규모의 반도체 소자가 적용되는 예를 들어, 평판 디스플레이 소자의 품질을 크게 향상시킨다.
이동도, 다결정, 단결정, 반도체, 박막트랜지스터

公开(公告)号：KR1020090126813A

公开(公告)日：2009-12-09

申请号：KR1020080053128

申请日：2008-06-05

Applicant: 삼성전자주식회사

Inventor： 정지심 ,  박영수 ,  이상윤 ,  김창정 ,  김태상 ,  권장연 ,  손경석

IPC: G02F1/136 ,  H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/66969 ,  H01L29/66742 ,  H01L21/324

Abstract: PURPOSE: A manufacturing method of an oxide semiconductor TFT(Thin Film Transistor) which an oxide semiconductor is used for a channel is provided to improve the characteristic of a device by using an oxide semiconductor as a channel material. CONSTITUTION: A gate insulation film(110) is formed on a substrate in order to cover the gate after the gate is formed on the substrate. A channel layer(116) consisting of the transparent oxide semiconductor is formed on the gate insulating layer. Source and drain electrodes are respectively formed on both sides of the channel layer. A protective film(120) is formed in order to cover source, drain electrode, and the channel layer. The substrate in which the protective film is formed is heat-treated at a temperature of 100 degrees.

Abstract translation: 目的：提供氧化物半导体用于沟道的氧化物半导体TFT（薄膜晶体管）的制造方法，以通过使用氧化物半导体作为沟道材料来提高器件的特性。 构成：在衬底上形成栅极之后，在衬底上形成栅极绝缘膜（110）以覆盖栅极。 由栅极绝缘层形成由透明氧化物半导体构成的沟道层（116）。 源极和漏极分别形成在沟道层的两侧。 为了覆盖源极，漏电极和沟道层，形成保护膜（120）。 形成有保护膜的基板在100度的温度下进行热处理。

公开(公告)号：KR1020090095315A

公开(公告)日：2009-09-09

申请号：KR1020080020585

申请日：2008-03-05

Applicant: 삼성전자주식회사

Inventor： 박경배 ,  김태상 ,  이상윤 ,  류명관 ,  권장연 ,  유병욱 ,  손경석 ,  정지심

IPC: C09K13/04 ,  H01L21/306 ,  H01L29/786

CPC classification number: C09K13/04 ,  C23F1/16 ,  H01L21/306 ,  H01L29/41733 ,  H01L29/7869

Abstract: An etchant for the source of an oxide semiconductor thin film transistor and a drain electrode, and a method for preparing an oxide semiconductor thin film transistor by using the etchant are provided to prevent the back etching of an oxide semiconductor and the dissolution of an oxide semiconductor and to improve etching rate. An etchant for the source of an oxide semiconductor thin film transistor and a drain electrode comprises hydrogen peroxide, ammonium hydroxide, and water. A manufacturing method of an oxide semiconductor thin film transistor comprises the steps of forming a gate on a substrate(110), and forming a gate insulating layer(114) on the substrate so as to cover the gate; forming a channel layer(116) comprising an oxide semiconductor on the gate insulating layer; and forming a metal layer for the formation of a source and a drain electrode at on both surfaces of the channel layer, and pattering it by using the etchant to form a source and drain electrodes(118a,118b).

Abstract translation: 提供了用于氧化物半导体薄膜晶体管和漏极的源的蚀刻剂，以及通过使用蚀刻剂制备氧化物半导体薄膜晶体管的方法，以防止氧化物半导体的反向蚀刻和氧化物半导体的溶解 并提高蚀刻速率。 用于氧化物半导体薄膜晶体管和漏电极源的蚀刻剂包括过氧化氢，氢氧化铵和水。 氧化物半导体薄膜晶体管的制造方法包括以下步骤：在衬底（110）上形成栅极，并在衬底上形成栅极绝缘层（114）以覆盖栅极; 在所述栅极绝缘层上形成包含氧化物半导体的沟道层（116）; 以及在沟道层的两个表面上形成用于形成源极和漏极的金属层，并且通过使用蚀刻剂来形成源极和漏极以形成源极和漏极（118a，118b）。

公开(公告)号：KR1020090079696A

公开(公告)日：2009-07-22

申请号：KR1020080005854

申请日：2008-01-18

Applicant: 삼성전자주식회사 ,  성균관대학교산학협력단

Inventor： 박경배 ,  김홍범 ,  염근영 ,  이형철 ,  이상윤 ,  류명관 ,  김태상 ,  권장연 ,  손경석 ,  정지심

IPC: H05H1/26 ,  H01L21/205

CPC classification number: H01J37/3211 ,  H01J37/32183 ,  H01J37/32431 ,  H01J37/32715 ,  H01Q1/366 ,  H05H1/46 ,  H05H2001/2412 ,  H05H2001/4667 ,  H05H2001/4682

Abstract: A plasma processing apparatus having linear antennas is provided to improve density uniformity of plasma by changing a thickness of a dielectric for surrounding the linear antenna. A plasma processing apparatus having linear antennas includes a reaction chamber(110), a substrate supporting plate(120), linear antennas(132), an RF power source(138), and a dielectric(142). The substrate supporting plate is installed in a lower side of the inside of the reaction chamber in order to support a substrate to be processed. The linear antennas are used for inducing electric field to generate electric field. The linear antennas are installed in parallel to each other at an upper side of the inside of the reaction chamber. The RF power source is connected to the linear antennas in order to supply RF power to the linear antennas. The dielectric is formed to surround each of the linear antennas. The thickness of the dielectric is gradually reduced from a RF power input terminal of each linear antenna to a grounding terminal(132b).

Abstract translation: 提供具有线性天线的等离子体处理装置，通过改变用于包围线状天线的电介质的厚度来改善等离子体的密度均匀性。 具有线性天线的等离子体处理装置包括反应室（110），基板支撑板（120），线性天线（132），RF电源（138）和电介质（142）。 基板支撑板安装在反应室内侧的下侧，以便支撑待处理的基板。 线性天线用于感应电场以产生电场。 线性天线在反应室内部的上侧彼此平行地安装。 RF电源连接到线性天线，以便向线性天线提供RF功率。 电介质形成为围绕每个线性天线。 电介质的厚度从每个线性天线的RF功率输入端逐渐减小到接地端子（132b）。

公开(公告)号：KR1020090057690A

公开(公告)日：2009-06-08

申请号：KR1020070124383

申请日：2007-12-03

Applicant: 삼성전자주식회사

Inventor： 손경석 ,  이상윤 ,  류명관 ,  김태상 ,  권장연 ,  박경배 ,  정지심

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/66969 ,  H01L21/265

Abstract: A method for manufacturing an oxide semiconductor thin film transistor is provided to improve stability and reliability of the semiconductor thin film transistor by using an oxide semiconductor made of a channel material. A gate insulating layer(114) is formed on a substrate with a gate(112). A channel layer(116) made of the oxide semiconductor is formed on a gate insulating layer. A source electrode(118a) and a drain electrode(118b) are formed in both sides of the channel layer. The plasma process is performed to supply the oxygen to the channel layer. The protection layer covering the source and drain electrodes, and the channel layer is formed. After forming the protection layer, the thermal process is performed.

Abstract translation: 提供一种用于制造氧化物半导体薄膜晶体管的方法，以通过使用由沟道材料制成的氧化物半导体来改善半导体薄膜晶体管的稳定性和可靠性。 在具有栅极（112）的基板上形成栅极绝缘层（114）。 在栅极绝缘层上形成由氧化物半导体构成的沟道层（116）。 源极电极（118a）和漏电极（118b）形成在沟道层的两侧。 执行等离子体处理以将氧气供应至沟道层。 形成覆盖源电极和漏电极的保护层以及沟道层。 形成保护层后，进行热处理。

公开(公告)号：KR1020090010757A

公开(公告)日：2009-01-30

申请号：KR1020070074119

申请日：2007-07-24

Applicant: 삼성전자주식회사

Inventor： 정지심 ,  이상윤 ,  류명관 ,  권장연 ,  박경배

IPC: H01L29/786 ,  H01L21/20

CPC classification number: H01L21/2053 ,  H01L29/6675

Abstract: A polycrystalline silicon thin film and a method of thin film transistor applying the same are provided to obtain medium quality of a poly-crystal silicon and a amorphous silicon in order to be used in a high quality electronic product. A silicon thin film(20) is formed with high density plasma chemical vapor deposition having plasma density more than 2.00E+11cm-3 on a substrate(10). Hydrogen gas is included to reaction gas. The gas forming the silicon thin film comprises one selected from the group of Ar and He. A polycrystalline silicon thin film and a method of thin film transistor applying the same comprises a step for forming a channel region and active layer having a source region and a drain region of the both sides of the channel regions.

Abstract translation: 提供多晶硅薄膜及其应用薄膜晶体管的方法以获得多晶硅和非晶硅的介质质量，以便用于高质量的电子产品中。 在衬底（10）上形成具有大于2.00E + 11cm-3的等离子体密度的高密度等离子体化学气相沉积的硅薄膜（20）。 氢气被包含在反应气体中。 形成硅薄膜的气体包括选自Ar和He的一种。 多晶硅薄膜和施加该多晶硅薄膜的薄膜晶体管的方法包括形成具有沟道区两侧的源极区和漏极区的沟道区和有源层的步骤。

公开(公告)号：KR1020080025830A

公开(公告)日：2008-03-24

申请号：KR1020060090467

申请日：2006-09-19

Applicant: 삼성전자주식회사

Inventor： 정지심 ,  김종만 ,  권장연 ,  박경배

IPC: H05B33/00 ,  H05B33/02 ,  H05B33/10

CPC classification number: H01L21/02672 ,  H01L21/02532 ,  H01L27/1277 ,  H01L27/3244

Abstract: An organic electro-luminescent display and a fabrication method thereof are provided to obtain an active layer with a low mobility and an active layer with a high mobility by obtaining different poly crystal silicon islands. An organic electro-luminescent display includes an amorphous silicon(2), a capping layer(3), a driving transistor, and a switching transistor. The capping layer is formed on the amorphous silicon and has two parts(3a,3b) having different thicknesses. The driving transistor is formed under a thick part of the capping layer and drives the organic electro-luminescent display. The switching transistor is formed under a thinner part of the capping layer and controls operation of the driving transistor.

Abstract translation: 提供一种有机电致发光显示器及其制造方法，通过获得不同的多晶硅岛获得具有低迁移率的有源层和具有高迁移率的有源层。 有机电致发光显示器包括非晶硅（2），封盖层（3），驱动晶体管和开关晶体管。 覆盖层形成在非晶硅上，并且具有不同厚度的两个部分（3a，3b）。 驱动晶体管形成在覆盖层的较厚部分的下方并驱动有机电致发光显示器。 开关晶体管形成在覆盖层的较薄部分的下方，并控制驱动晶体管的工作。

公开(公告)号：KR1020070040128A

公开(公告)日：2007-04-16

申请号：KR1020050095496

申请日：2005-10-11

Applicant: 삼성전자주식회사

Inventor： 박경배 ,  임혁 ,  타카시노구치 ,  조세영 ,  권장연

IPC: H01L29/786

Abstract: 셀프얼라인에 의한 오프셋 구조를 가지는 박막트랜지스터 및 그 제조방법에 관해 개시한다. 박막트랜지스터는 기판과; 기판 상에 형성되는 것으로 폭이 넓은 부분과 좁은 부분을 가지는 것으로 그 양측에 경사면이 형성된 돌출부를 가지는 버퍼층과; 상기 버퍼층의 돌출부상에 마련되는 채널과 돌출부의 양측에 위치하는 소스 및 드레인을 가지는 것으로 상기 돌출부의 양측 경사부에 대응하는 오프렛 구조를 가지는 반도체층과; 상기 돌출부의 상방에 마련되는 것으로 상기 돌출부의 좁은 부분에 비해 큰 폭을 가지는 게이트 절연층 및 게이트를 구비한다.
오프셋, LDD, 박막트랜지스터

公开(公告)号：KR1020060116540A

公开(公告)日：2006-11-15

申请号：KR1020050038986

申请日：2005-05-10

Applicant: 삼성전자주식회사

Inventor： 타카시노구치 ,  조세영 ,  선우문욱 ,  김도영 ,  권장연 ,  후아샹잉 ,  박경배 ,  장샤오신

IPC: H01L29/786

CPC classification number: H01L21/84 ,  H01L27/11 ,  H01L27/1108 ,  H01L27/1203 ,  H01L29/66772 ,  H01L29/7842 ,  Y10S257/903 ,  H01L27/092 ,  H01L21/8238

Abstract: A semiconductor element, a semiconductor device with the same and methods for manufacturing a flat panel display and the semiconductor element are provided to improve the degree of integration and to increase the mobility of carrier by using a single crystal TFT structure composed of PMOS single crystal TFT and an NMOS single crystal TFT. A semiconductor element comprises a substrate(40), a PMOS single crystal TFT, and an NMOS single crystal TFT. The PMOS single crystal TFT is formed on the substrate. The NMOS single crystal TFT is formed on the PMOS single crystal TFT. A first source region of the PMOS single crystal TFT is connected with a second source region of the NMOS single crystal TFT.

Abstract translation: 提供半导体元件，具有该半导体元件的半导体器件以及用于制造平板显示器和半导体元件的方法，以通过使用由PMOS单晶TFT构成的单晶TFT结构来提高集成度和增加载流子的迁移率 和NMOS单晶TFT。 半导体元件包括衬底（40），PMOS单晶TFT和NMOS单晶TFT。 PMOS单晶TFT形成在基板上。 NMOS单晶TFT形成在PMOS单晶TFT上。 PMOS单晶TFT的第一源极区域与NMOS单晶TFT的第二源极区域连接。

公开(公告)号：KR1020060108124A

公开(公告)日：2006-10-17

申请号：KR1020050030285

申请日：2005-04-12

Applicant: 삼성전자주식회사

Inventor： 정지심 ,  권장연 ,  임혁 ,  타카시노구치

IPC: H01L29/786

CPC classification number: H01L29/4908 ,  H01L21/02252 ,  H01L21/0226 ,  H01L29/42384

Abstract: 개시된 실리콘 박막트랜지스터는: 기판에 형성되는 실리콘 채널과; 상기 실리콘 채널 위에 형성되는 게이트 절연층과; 상기 게이트 절연층 위에 마련되는 게이트를; 구비하고, 상기 게이트 절연층은 상기 실리콘 채널의 플라즈마 저온산화에 의한 산화막 및 상기 채널에 별도로 증착된 산화막을 포함하는 구조를 가진다. 이러한 박막트랜지스터는 게이트절연층과 채널간의 개선된 인터페이스특성을 가지며, 특히 낮은 구동전압을 가진다.
다결정, 실리콘, 게이트 절연층, 플라즈마 산화, 저온산화