公开(公告)号：DE10208450B4

公开(公告)日：2004-09-16

申请号：DE10208450

申请日：2002-02-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SAENGER ANNETTE ,  SELL BERNHARD ,  SEIDL HARALD ,  HECHT THOMAS ,  GUTSCHE MARTIN

IPC: C23C16/34 ,  C23C16/40 ,  C23C16/42 ,  C23C16/44 ,  C23C16/455 ,  C23C16/46 ,  C23C16/48 ,  C23C16/30

Abstract: Process chamber for producing a layer of material on sections of a surface (8) of a substrate (3) comprises: holding unit (2) for substrate; feeding and removal units (6) for gas phases of chemical precursors of the layer material; substrate feeding device (11) for introducing substrate into process chamber; heating source (9) for heating the substrate and/or substrate surface; and control unit. The control unit is used for sequentially introducing the chemical precursor compounds. The heating source (9) is formed as a radiation source, by means of which the temperature on the substrate surface can be changed in steps of more than 100 K per second. The radiation source is a heating lamp and is arranged in the chamber inner chamber (5) of the process chamber enclosed by a chamber wall (4). An Independent claim is also included for a process for depositing a layer of material on sections of a surface of a substrate.

公开(公告)号：DE10308888A1

公开(公告)日：2004-09-09

申请号：DE10308888

申请日：2003-02-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GUTSCHE MARTIN ,  SEIDL HARALD

IPC: H01G4/228 ,  H01L21/334 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/94

Abstract: An arrangement of at least two capacitors (14,15) in or on a substrate (2), where outer capacitor (14) at least partially encloses inner capacitor (15). An independent claim is included for a process of preparing the arrangement in which a trough (16) is introduced into prepared substrate (2), a first dielectric layer (17) is formed on the trough wall, a first electrode layer (18) is applied to layer (17), a second dielectric layer (20) to layer (18), and contact layers and further dielectric and electrode layers are then applied.

公开(公告)号：DE10303413B3

公开(公告)日：2004-08-05

申请号：DE10303413

申请日：2003-01-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SEIDL HARALD ,  GUTSCHE MARTIN ,  HECHT THOMAS

IPC: C23C16/00 ,  H01L21/02 ,  H01L21/31 ,  H01L21/311 ,  H01L21/314 ,  H01L21/70 ,  H01L21/8234 ,  H01L21/8242

Abstract: Production of structured ceramic layers on surfaces of a relief arranged vertically to a substrate surface comprises preparing a semiconductor substrate (1) with a relief on its surface, filling the relief with a lacquer (4) up to a determined depth, depositing a ceramic layer (6) made from a ceramic material using a low temperature ALD process, anisotropically etching the ceramic layer so that the ceramic layer remains on the surfaces which are vertical to the substrate surface, and removing the lacquer layer.

公开(公告)号：DE10130936B4

公开(公告)日：2004-04-29

申请号：DE10130936

申请日：2001-06-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： REISINGER HANS ,  GUTSCHE MARTIN ,  SCHUPKE KRISTIN ,  JAKSCHIK STEFAN ,  LEONHARDT MATTHIAS ,  SEIDL HARALD ,  SCHROEDER UWE ,  HECHT THOMAS

IPC: C23C16/02 ,  C23C16/44 ,  C23C16/455 ,  H01L21/306 ,  H01L21/316 ,  H01L21/8242 ,  C30B29/16

Abstract: The present invention provides a method for fabricating a semiconductor component having a substrate (1) and a dielectric layer (70) provided on or in the substrate (1), the dielectric layer (7) being deposited in alternating self-limiting monolayer form, in the form of at least two different precursors, by means of an ALD process. There is provision for conditioning of the surface of the substrate (1) prior to the deposition of a first monolayer of a first precursor with respect to a reactive ligand of the first precursor.

公开(公告)号：DE10240106A1

公开(公告)日：2004-03-11

申请号：DE10240106

申请日：2002-08-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HECHT THOMAS ,  SCHROEDER UWE ,  SEIDL HARALD ,  GUTSCHE MARTIN ,  JAKSCHIK STEFAN ,  KUDELKA STEPHAN ,  BIRNER ALBERT

IPC: H01L21/02 ,  H01L21/28 ,  H01L21/311 ,  H01L21/316 ,  H01L21/768 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/08 ,  H01L29/49 ,  H01L21/283 ,  H01L21/8242

Abstract: Etching process for removing material from semiconductor wafers comprises preparing a semiconductor wafer as substrate, providing an etching signal layer (2) on sections of the substrate surface, providing a process layer (3) on sections of the etching signal layer, removing sections of the process layer, producing an etching signal during exposure of the removed sections of the etching signal layer lying below the process layer, and stopping the etching process depending on the etching signals. The etching signal layer is formed by sequential gas phase deposition or molecular beam epitaxy as dielectric layer made from a metal oxide or rare earth oxide. An Independent claim is also included for an etching signal layer.

公开(公告)号：DE10130936A1

公开(公告)日：2003-01-16

申请号：DE10130936

申请日：2001-06-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： REISINGER HANS ,  GUTSCHE MARTIN ,  SCHUPKE KRISTIN ,  JAKSCHIK STEFAN ,  LEONHARDT MATTHIAS ,  SEIDL HARALD ,  SCHROEDER UWE ,  HECHT THOMAS

IPC: C23C16/02 ,  C23C16/44 ,  C23C16/455 ,  H01L21/306 ,  H01L21/316 ,  H01L21/8242 ,  C30B29/16

Abstract: Process for producing a semiconductor element having a dielectric layer (70) deposited on a substrate (1) in a monolayer alternately in the form of at least two different precursors using an ALD process comprises conditioning of the surface of the substrate before deposition of the first monolayer of a first precursor with regard to a reactive ligand of the first precursor. Preferred Features: A silicon oxide layer is removed from the surface of the substrate during conditioning. OH-, H- or H2-conditioning of the surface of the substrate is carried out.

公开(公告)号：DE10034003A1

公开(公告)日：2002-01-24

申请号：DE10034003

申请日：2000-07-07

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SEIDL HARALD ,  GUTSCHE MARTIN

IPC: H01L21/8242 ,  H01L29/94 ,  H01L27/108

Abstract: Trench capacitor comprises: trench (2) formed in semiconductor substrate (1); conducting capacitor plates (60, 80); a dielectric layer (70) as capacitor dielectric applied by atomic layer deposition, atomic layer chemical vapor deposition or chemical vapor deposition between the plates; insulating collar (5'') in an upper region of trench; and an optional conducting filler material in the trench. Preferred Features: The first plate is a region of high doping in the substrate in the lower region of the trench and the second plate is the conducting filler material. The dielectric layer is made of alumina (Al2O3), tantalum pentoxide (Ta2O5), zirconia (ZrO2), hafnium oxide (HfO2), yttrium oxide (Y2O3), lanthanum oxide (La2O3), titanium oxide (TiO2), aluminum - tantalum oxygen (Al-Ta-O), aluminum - zirconium - oxygen (Al-Zr-O), aluminum - hafnium - oxygen (Al-Hf-O), aluminum - lanthanum - oxygen (Al-La-O), aluminum - titanium oxygen (Al-Ti-O), zirconium yttrium - oxygen (Zr-Y-O), zirconium - silicon - oxygen (Zr-Si-O), hafnium - silicon - oxygen (Hf-Si-O), silicon - oxygen - nitrogen (Si-O-N), tantalum - oxygen - nitrogen (Ta-O-N), gadolinium oxide (Gd2O3), tin oxide (SnO3), lanthanum - silicon - oxygen (La-Si-O), titanium -silicon -oxygen (Ti-Si-O), lanthanum aluminate (LaAlO3), zirconium titanate (ZrTiO4), (zirconium, tin) titanate ((Zr, Sn)TiO4), strontium zirconate (SrZrO4), lanthanum aluminate (LaAlO4) or barium zirconate (BaZrO3).

公开(公告)号：DE19958905C1

公开(公告)日：2001-04-12

申请号：DE19958905

申请日：1999-12-07

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GUTSCHE MARTIN

IPC: H01L21/033 ,  H01L21/311 ,  H01L21/768 ,  H01L21/308 ,  H01L21/283 ,  H01L21/314

Abstract: Production of a structure in a substrate (10) comprises forming a hard mask (20) on the substrate; forming a structure of trenches (T1, T2) in the substrate having a high aspect ratio using the mask; self-adjusting a second hard mask (30) on the first hard mask and the trench structure using non-conforming deposition of a Ti or Ti compound so that the deposited material of the second mask is deposited only on the upper side of the first mask; converting the Ti or Ti compound by tempering into TiO2; and forming a modified structure by selectively etching using the second mask so that the modified structure has even higher aspect ratio. Preferred Features: The first and/or second masks are deposited by a CVD process.

公开(公告)号：DE10345162B4

公开(公告)日：2006-11-16

申请号：DE10345162

申请日：2003-09-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SEIDL HARALD ,  GUTSCHE MARTIN

IPC: H01L21/8242 ,  H01L21/02 ,  H01L21/20 ,  H01L21/334 ,  H01L21/336 ,  H01L21/82 ,  H01L27/108

公开(公告)号：DE10131709B4

公开(公告)日：2006-10-26

申请号：DE10131709

申请日：2001-06-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GOEBEL BERND ,  STEINHOEGL WERNER ,  KERSCH ALFRED ,  GUTSCHE MARTIN

IPC: H01L21/8242 ,  H01L21/3213

Abstract: Buried straps are produced on one side in deep trench structures. A PVD process is used to deposit masking material in the recess inclined at an angle. As a result, a masking wedge is produced on the buried strap, on one side in the base region of the recess. The masking wedge serves as a mask during a subsequent anisotropic etching step, which is carried out selectively with respect to the masking wedge, for removing the buried strap on one side.