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    41.
    发明专利
    未知

    公开(公告)号：DE69428888D1

    公开(公告)日：2001-12-06

    申请号：DE69428888

    申请日：1994-06-30

    Applicant: ST MICROELECTRONICS SRL

    Inventor： REZZI FRANCESCO ,  BASCHIROTTO ANDREA ,  CASTELLO RINALDO

    IPC: H03F3/45

    Abstract: The transconductor system in accordance with the present invention is the type comprising a first transconductor circuit (C1) having differential mode transconductance equal to a first value and common mode transconductance equal to a second value and is characterised in that it comprises a second transconductor circuit (C2) connected in parallel with said transconductor circuit (C1) having common mode transconductance substantially equal in modulus to said second value and of opposite sign. In this manner the common mode current signal at the output is greatly reduced.

    43.
    发明专利
    未知

    公开(公告)号：ITTO20000493A1

    公开(公告)日：2001-11-26

    申请号：ITTO20000493

    申请日：2000-05-26

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BASCHIROTTO ANDREA ,  CUSINATO PAOLO ,  MONTAGNA GIAMPIERO ,  CASTELLO RINALDO

    IPC: H03F3/00 ,  H03F3/45

    Abstract: A switched operational amplifier with fully differential topology, alternately switchable on and off, and a control circuit. The operational amplifier has a first differential output (4a) and a second differential output, and a control terminal. The control circuit includes a capacitive detecting network including a first capacitor and a second capacitor connected between the first and second differential outputs and a common-mode node, and a third capacitor connected between the common-mode node and ground in a first operative condition, and between the common-mode node and the supply voltage in a second operative condition. A control transistor is connected between the common-mode node and the control terminal of the operational amplifier and supplies a control current correlated to the voltage on the common-mode node. A switchable voltage source, connected to the common-mode node, supplies a desired voltage in a first operative condition, when the operational amplifier is off.

    46.
    发明专利
    未知

    公开(公告)号：ITMI20000393D0

    公开(公告)日：2000-02-29

    申请号：ITMI20000393

    申请日：2000-02-29

    Applicant: ST MICROELECTRONICS SRL

    Inventor： CASTELLO RINALDO ,  PORTALURI SALVATORE ,  PISATI VALERIO ,  CAZZANIGA MARCO

    IPC: H03F1/42 ,  H03H11/04

    Abstract: This invention relates to a circuit structure of the feedforward type with programmable zeroes, particularly for synthesizing time-continual filters. This structure comprises a pair of amplification cells (14,15) interconnected at at least one interconnection node (A) and connected between a first signal (Vin) input (IN) of a first cell (14) and an output terminal (U) of the second cell (15, each cell (14,15) comprising a pair of transistors (10,2;6,7) which have a conduction terminal in common and have the other conduction terminals coupled respectively to a first voltage reference (Vcc) through respective bias members (3,4;9,11). The structure further comprises a circuit leg (13) connecting a node (X) of the first cell (14) to the output terminal (U) and comprising a transistor (8) which has a control terminal connected to the node (X) of the first cell (14), a first conduction terminal connected to the output terminal (U), and a second conduction terminal coupled to a second voltage reference (GND) through a capacitor (Cc). Thus, a released "zero" can be introduced in the right semiplane of the pole-zero complex plane to improve the flattening of group gain.

    47.
    发明专利
    未知

    公开(公告)号：DE69228812T2

    公开(公告)日：1999-08-12

    申请号：DE69228812

    申请日：1992-09-14

    Applicant: ST MICROELECTRONICS SRL

    Inventor： TOMASINI LUCIANO ,  CASTELLO RINALDO

    IPC: H03F3/343 ,  H03F3/347 ,  H03H11/48 ,  H04B1/58 ,  H04M1/58 ,  H04M1/76 ,  H04M1/00

    Abstract: The invention relates to a method for implementing an impedance associated with a monolithically integrated telephone subscriber circuit (2) which is connected to a telephone line (3) having at least one terminal pair (L+,L-). The method consists of providing, a single resistor (Re) connected serially to one terminal (L+) of the telephone line (3), and circuit means (1) connected in a closed loop to the terminal (L+) to divide, by a predetermined factor, the value of the resistor (Re) on the occurrence of DC or very low frequency signals.

    48.
    发明专利
    未知

    公开(公告)号：DE69228812D1

    公开(公告)日：1999-05-06

    申请号：DE69228812

    申请日：1992-09-14

    Applicant: ST MICROELECTRONICS SRL

    Inventor： TOMASINI LUCIANO ,  CASTELLO RINALDO

    IPC: H03F3/343 ,  H03F3/347 ,  H03H11/48 ,  H04B1/58 ,  H04M1/58 ,  H04M1/76 ,  H04M1/00

    Abstract: The invention relates to a method for implementing an impedance associated with a monolithically integrated telephone subscriber circuit (2) which is connected to a telephone line (3) having at least one terminal pair (L+,L-). The method consists of providing, a single resistor (Re) connected serially to one terminal (L+) of the telephone line (3), and circuit means (1) connected in a closed loop to the terminal (L+) to divide, by a predetermined factor, the value of the resistor (Re) on the occurrence of DC or very low frequency signals.

    49.
    发明专利
    未知

    公开(公告)号：DE69228420D1

    公开(公告)日：1999-03-25

    申请号：DE69228420

    申请日：1992-09-16

    Applicant: ST MICROELECTRONICS SRL

    Inventor： TOMASINI LUCIANO ,  CASTELLO RINALDO

    IPC: H04M19/08

    Abstract: A certain amount of DC supply current derivable from a subscriber's line (VL, GROUND) is used for powering at respective regulated voltages a plurality of functional circuits (A,B...) of an equipment connectable to the line. A sensible energy saving can be achieved by splitting the valuable current among the functional circuits, on account of their priority rank, by using at least a differential pair of current delivering transistors (P2,P3). A special circuit monitors the actual current of absorption of the functional circuit of highest rank (A) and produces a control signal that is used for modifying the drive conditions of the current delivering transistors. The current waste caused by sinking a design maximum current through a dissipative shunt voltage regulator of each functional circuit as done in the prior art circuits, is prevented and all the current exceeding the actual absorption needs of the highest rank functional circuit may be distributed to the other functional circuits without waste. This same principle may be advantageously applied also to functional circuits of lesser and lesser rank of priority for maximizing the saving.

    50.
    发明专利
    未知

    公开(公告)号：ITVA990005D0

    公开(公告)日：1999-02-22

    申请号：ITVA990005

    申请日：1999-02-22

    Applicant: ST MICROELECTRONICS SRL

    Inventor： MILANESE CARLO MARIA ,  CASTELLO RINALDO

    IPC: H03K3/3565 ,  H03K5/24

    Abstract: A comparator circuit includes a differential input stage, a second differential stage having a differential output, and an output stage transforming an output signal from the differential output of the second differential stage into an output signal having a logic level. The comparator further includes a common mode measuring stage. The common mode measuring stage includes a differential pair of input transistors and a differential pair of complementary transistors biased by respective current generators, and a current mirror summing the differential output currents of the two complementary transistors pairs into a single output current signal. A switching stage is controlled by the differential output nodes of the second differential stage. A common source node of the switch stage is coupled to the output of the common mode measuring stage and to the differential output nodes of the differential input stage.

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