公开(公告)号：JP2015504373A

公开(公告)日：2015-02-12

申请号：JP2014540951

申请日：2012-11-09

Applicant: ユー エレクトロニクス シーオー. エルティディ. ,  ユー エレクトロニクス シーオー. エルティディ.

Inventor： ヨン フィ ハン ,  ヨン フィ ハン ,  ヒョン ウォン キム ,  ヒョン ウォン キム ,  ミ ソク アン ,  ミ ソク アン

IPC: B81B7/02 ,  B81C3/00 ,  G01J1/02 ,  G01J1/04 ,  H01L21/60 ,  H01L23/02

CPC classification number: B81B7/0038 ,  B81B7/007 ,  B81B2201/0207 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2207/096 ,  B81C1/00269 ,  B81C1/00285 ,  B81C2203/0118 ,  G01P15/0802 ,  H01L31/02016 ,  H01L2224/291 ,  H01L2924/014

Abstract: 本発明によるMEMSセンサパッケージングは、ROIC回路が形成された第1ウェハと、上記第1ウェハと対応するように配置され、一面に凹部が形成されてMEMSセンサが設けられた第2ウェハと、上記第1ウェハと上記第2ウェハを接合して上記MEMSセンサが密封されるように上記MEMSセンサの周囲に沿って形成された接合半田と、上記第1ウェハのROIC回路と上記第2ウェハのMEMSセンサを電気的に連結するために形成されたパッド半田と、を含むことにその特徴がある。本発明によると、ROIC回路が形成されたウェハとMEMSセンサが形成されたウェハを接合してパッケージングするにあたり、ROIC回路とMEMSセンサを電気的に連結するためのパッド半田を内部に形成することで、パッケージのサイズを低減させ、安定的に電気的信号を供給することができる。

Abstract translation: MEMS根据本发明的传感器封装，第一晶片ROIC电路形成，并且所述第一被布置成对应于所述晶片，所述第二晶片凹部形成在一个表面上是设置在所述MEMS传感器， 和结合其沿着MEMS传感器的周围形成作为MEMS传感器被气密通过键合第一晶片和所述第二晶片，所述第一ROIC电路和第二晶片晶片密封焊料 这是它的功能，以包括形成用于电连接MEMS传感器垫的焊料。 根据本发明，当形成包装通过接合晶片和MEMS传感器ROIC电路的晶片上形成，以形成用于电连接电路ROIC垫焊料和内MEMS传感器 在降低了封装的大小，因此能够稳定地提供电信号。

公开(公告)号：KR100930590B1

公开(公告)日：2009-12-09

申请号：KR1020070130698

申请日：2007-12-14

Applicant: 한국전자통신연구원

Inventor： 조성목 ,  류호준 ,  양우석 ,  전상훈 ,  유병곤 ,  최창억

IPC: H01L31/09 ,  H01L31/101

CPC classification number: G01J5/20 ,  B81B3/007 ,  B81B2201/0207 ,  B81B2203/0118 ,  G01J5/02 ,  G01J5/023 ,  G01J5/024

Abstract: 본 발명은 지지팔 구조를 갖는 적외선 센서 및 그 제조방법에 관한 것으로, 보다 상세하게는 종래 기술에 따른 2차원 구조의 지지팔을 개량한 3차원 구조의 지지팔을 갖는 적외선 센서 및 그 제조방법에 관한 것이다. 본 발명에 따른 멤스형 적외선 센서 제조 방법은, 판독회로 및 흡수구조 형성을 위한 반사층을 포함하는 기판을 제공하는 단계와, 상기 기판상에 희생층을 형성하는 단계와, 상기 희생층에 요철단면을 갖는 지지팔 구조체를 형성하는 단계와, 상기 지지팔 구조체에 의해 상기 기판과 격리되는 센서부를 형성하는 단계와, 상기 희생층을 제거하는 단계를 포함한다.
멤스, 적외선 센서, 볼로미터

Abstract translation: 本发明提供一种具有悬臂结构的微辐射热测量仪及其制造方法，更具体地，提供一种从传统的二维悬臂结构改进的具有三维悬臂结构的微辐射热测定仪及其制造方法。 该方法包括：提供包括用于形成吸收结构的读出集成电路和反射层的衬底，在衬底上形成牺牲层，在牺牲层中形成具有不平坦横截面的悬臂结构，形成传感器部分 通过悬臂结构与衬底隔离，并去除牺牲层。

公开(公告)号：US12006209B2

公开(公告)日：2024-06-11

申请号：US16980792

申请日：2019-03-14

Applicant: Obsidian Sensors, Inc.

Inventor： John Hong ,  Tallis Chang ,  Edward Chan ,  Bing Wen ,  Yaoling Pan ,  Sean Andrews

IPC: B81B3/00 ,  B81C1/00 ,  G01J5/20

CPC classification number: B81C1/00595 ,  B81B3/0081 ,  B81C1/0069 ,  G01J5/20 ,  B81B2201/0207 ,  B81B2203/019 ,  B81C2201/0105 ,  B81C2201/014

Abstract: A method of manufacturing an electromechanical systems structure includes manufacturing sub-micron structural features. In some embodiments, the structural features are less than the lithographic limit of a lithography process.

公开(公告)号：US20230384164A1

公开(公告)日：2023-11-30

申请号：US18025940

申请日：2021-08-04

Applicant: MSG Lithoglas GmbH

Inventor： David Bunel ,  Ulli Hansen ,  Simon Maus

IPC: G01J5/20 ,  G01J5/08 ,  G01J5/0875 ,  B81B7/00 ,  B81C1/00

CPC classification number: G01J5/20 ,  G01J5/0879 ,  G01J5/0875 ,  B81B7/0067 ,  B81C1/00317 ,  B81B2201/0207 ,  B81C2203/0109 ,  B81C2203/031

Abstract: A method of forming an infrared detector includes defining an optical window in a cover substrate. Defining the optical window includes forming a multilayer interference filter or a periodic diffraction grating on an upper surface of the optical window and a periodic diffraction grating on the lower surface of the optical window. The method also includes performing anodic bonding of a spacer onto the cover substrate, transferring the cover substrate provided onto a base substrate, and hermetically bonding the spacer onto the base substrate.

公开(公告)号：US20180226309A1

公开(公告)日：2018-08-09

申请号：US15942911

申请日：2018-04-02

Applicant: RAYTHEON COMPANY

Inventor： Roland W. Gooch ,  Buu Q. Diep ,  Adam M. Kennedy ,  Stephen H. Black ,  Thomas A. Kocian

IPC: H01L23/10 ,  H01L21/768 ,  H01L21/52 ,  H01L27/146 ,  H01L23/498 ,  H01L23/26 ,  B81B7/00 ,  B81C1/00

CPC classification number: H01L23/10 ,  B81B7/0038 ,  B81B2201/0207 ,  B81C1/00269 ,  B81C2203/035 ,  H01L21/52 ,  H01L21/76841 ,  H01L23/26 ,  H01L23/49866 ,  H01L27/14618 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14683 ,  H01L27/1469 ,  H01L2224/16 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.

公开(公告)号：US09966320B2

公开(公告)日：2018-05-08

申请号：US15270145

申请日：2016-09-20

Applicant: RAYTHEON COMPANY

Inventor： Roland W. Gooch ,  Buu Q. Diep ,  Adam M. Kennedy ,  Stephen H. Black ,  Thomas A. Kocian

IPC: H01L23/48 ,  H01L23/02 ,  H01L23/10 ,  H01L23/498 ,  H01L21/768 ,  B81B7/00 ,  H01L23/26 ,  H01L27/146 ,  B81C1/00 ,  H01L21/52

CPC classification number: H01L23/10 ,  B81B7/0038 ,  B81B2201/0207 ,  B81C1/00269 ,  B81C2203/035 ,  H01L21/52 ,  H01L21/76841 ,  H01L23/26 ,  H01L23/49866 ,  H01L27/14618 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14683 ,  H01L27/1469 ,  H01L2224/16 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.

公开(公告)号：US09796580B2

公开(公告)日：2017-10-24

申请号：US14738745

申请日：2015-06-12

Applicant: InvenSense, Inc.

Inventor： Peter Smeys ,  Martin Lim

IPC: B81B7/00

CPC classification number: B81B7/007 ,  B81B2201/0207 ,  B81B2201/0214 ,  B81B2201/0228 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2201/0271 ,  B81B2201/0278 ,  B81B2203/0315 ,  B81B2207/012 ,  B81C1/00238 ,  B81C2203/0785 ,  B81C2203/0792 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A sensor chip combining a substrate comprising at least one CMOS circuit, a MEMS substrate and another substrate comprising at least one CMOS circuit in one package that is vertically stacked is disclosed. The package comprises a sensor chip further comprising a first substrate with a first surface and a second surface comprising at least one CMOS circuit; a MEMS substrate with a first surface and a second surface; and a second substrate comprising at least one CMOS circuit. Where the first surface of the first substrate is attached to a packaging substrate and the second surface of the first substrate is attached to the first surface of the MEMS substrate. The second surface of the MEMS substrate is attached to the second substrate. The first substrate, the MEMS substrate, the second substrate and the packaging substrate are mechanically attached and provided with electrical inter-connects.

公开(公告)号：US20160149105A1

公开(公告)日：2016-05-26

申请号：US14951554

申请日：2015-11-25

Applicant: Melexis Technologies NV

Inventor： Carl VAN BUGGENHOUT ,  Appolonius Jacobus VAN DER WIEL ,  Luc BUYDENS

IPC: H01L35/28 ,  H01L35/34 ,  H01L27/144 ,  H01L31/09

CPC classification number: H01L35/28 ,  B81B7/02 ,  B81B2201/0207 ,  B81B2203/0315 ,  G01J1/0214 ,  G01J1/0295 ,  G01J1/4228 ,  G01J5/0225 ,  G01J5/024 ,  G01J5/0285 ,  G01J5/045 ,  G01J5/06 ,  G01J5/0803 ,  G01J5/12 ,  G01J2005/068 ,  H01L27/144 ,  H01L27/1443 ,  H01L31/0203 ,  H01L31/02164 ,  H01L31/09 ,  H01L35/34

Abstract: A chip for radiation measurements, the chip comprising a first substrate comprising a first sensor and a second sensor. The chip moreover comprises a second substrate comprising a first cavity and a second cavity both with oblique walls. An internal layer is present on the inside of the second cavity. The second substrate is sealed to the first substrate with the cavities on the inside such that the first cavity is above the first sensor and the second cavity is above the second sensor.

Abstract translation: 一种用于辐射测量的芯片，该芯片包括包括第一传感器和第二传感器的第一基板。 该芯片还包括第二基板，其包括具有倾斜壁的第一腔和第二腔。 内层存在于第二腔的内侧。 第二基板被密封到第一基板上，在内部具有空腔，使得第一腔在第一传感器之上，第二腔位于第二传感器之上。

公开(公告)号：US09162868B2

公开(公告)日：2015-10-20

申请号：US14091492

申请日：2013-11-27

Applicant: Infineon Technologies AG

Inventor： Stefan Kolb ,  Andreas Meiser ,  Till Schloesser ,  Wolfgang Werner

IPC: H01L21/00 ,  B81B3/00 ,  G01P15/125 ,  G01N27/22 ,  G01L9/12 ,  B81C1/00

CPC classification number: B81B3/0021 ,  B81B3/0086 ,  B81B2201/0207 ,  B81B2201/0235 ,  B81B2201/0264 ,  B81B2201/0292 ,  B81B2203/0118 ,  B81B2203/0307 ,  B81B2203/04 ,  B81C1/0015 ,  G01H1/00 ,  G01H11/06 ,  G01L9/0072 ,  G01L9/12 ,  G01N27/223 ,  G01P15/125

Abstract: A MEMS device includes a fixed electrode and a movable electrode arranged isolated and spaced from the fixed electrode by a distance. The movable electrode is suspended against the fixed electrode by one or more spacers including an insulating material, wherein the movable electrode is laterally affixed to the one or more spacers.

Abstract translation: MEMS器件包括固定电极和可移动​​电极，与固定电极隔离并间隔一定距离。 可移动电极通过一个或多个包括绝缘材料的间隔件悬置在固定电极上，其中可动电极横向地固定到一个或多个间隔件上。

公开(公告)号：US08900906B2

公开(公告)日：2014-12-02

申请号：US13415479

申请日：2012-03-08

Applicant: Gary Yama ,  Fabian Purkl ,  Matthieu Liger ,  Matthias Illing

Inventor： Gary Yama ,  Fabian Purkl ,  Matthieu Liger ,  Matthias Illing

IPC: H01L21/02

CPC classification number: B81C1/00039 ,  B81B3/007 ,  B81B2201/0207 ,  B81B2203/0307 ,  B81C2201/0181 ,  G01J5/023 ,  H01L27/14649 ,  H01L27/14683

Abstract: In one embodiment, a method of forming a semiconductor device includes providing a substrate, forming a sacrificial layer above the substrate layer, forming a first trench in the sacrificial layer, forming a first sidewall layer with a thickness of less than about 50 nm on a first sidewall of the first trench using atomic layer deposition (ALD), and removing the sacrificial layer.

Abstract translation: 在一个实施例中，形成半导体器件的方法包括提供衬底，在衬底层上形成牺牲层，在牺牲层中形成第一沟槽，形成厚度小于约50nm的第一侧壁层 使用原子层沉积（ALD）的第一沟槽的第一侧壁，以及去除牺牲层。