公开(公告)号：EP4369396A1

公开(公告)日：2024-05-15

申请号：EP23198688.6

申请日：2023-09-21

Applicant: GlobalFoundries U.S. Inc.

Inventor： PANDEY, Shesh M. ,  KRISHNASAMY, Rajendran ,  JAIN, Vibhor

IPC: H01L23/525 ,  G11C17/16 ,  H01L23/34 ,  H10B20/25

CPC classification number: H01L23/5256 ,  H10B20/25 ,  G11C17/16 ,  H01L23/345

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to an e-fuse with metal fill structures and methods of manufacture. The structure includes: an insulator material; an e-fuse structure on the insulator material; a plurality of heaters on the insulator material and positioned on sides of the e-fuse structure; and conductive fill material within a space between the e-fuse structure and the plurality of heaters.

公开(公告)号：EP4365956A1

公开(公告)日：2024-05-08

申请号：EP23196430.5

申请日：2023-09-11

Applicant: GlobalFoundries U.S. Inc.

Inventor： DUTTA, Anupam ,  KRISHNASAMY, Rajendran ,  CHOPPALLI, Vvss Satyasuresh ,  JAIN, Vibhor ,  GAUTHIER JR., Robert J.

IPC: H01L29/737 ,  H01L29/08 ,  H01L21/331

CPC classification number: H01L29/737 ,  H01L29/0821 ,  H01L29/66242

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors (HBTs) with a buried trap rich region and methods of manufacture. The structure includes: a heterojunction bipolar transistor comprising a collector region, a base region and an emitter region; and at least one non-single-crystal semiconductor region in the collector region of the heterojunction bipolar transistor.

公开(公告)号：EP4357770A1

公开(公告)日：2024-04-24

申请号：EP23192055.4

申请日：2023-08-18

Applicant: GlobalFoundries U.S. Inc.

Inventor： Pawlak, Bartlomiej J. ,  Levy, Mark D. ,  Adusumilli, Siva P. ,  Hazbun, Ramsey M.

IPC: G01N27/414 ,  B01L3/00 ,  G01N33/00 ,  G01N27/64

CPC classification number: G01N27/414 ,  G01N27/64 ,  G01N33/48707

Abstract: A structure (100) includes a cavity (140) in a semiconductor substrate (108); a field effect transistor (112) positioned over the cavity (140); an opening (130) in the semiconductor substrate (108) extending to the cavity (140); and a layer of insulating material (132) filling the opening (130) and forming an insulating material window (132) to the cavity (140).

公开(公告)号：EP4354511A2

公开(公告)日：2024-04-17

申请号：EP23195277.1

申请日：2023-09-05

Applicant: GlobalFoundries U.S. Inc.

Inventor： ZIERAK, Michael J. ,  BENTLEY, Steven J. ,  SHARMA, Santosh ,  LEVY, Mark D. ,  KANTAROVSKY, Johnatan A.

IPC: H01L29/41 ,  H01L29/10 ,  H01L29/20 ,  H01L29/778

CPC classification number: H01L29/778 ,  H01L29/2003 ,  H01L29/404 ,  H01L29/402 ,  H01L29/1066

Abstract: A structure includes at least one gate structure (20, 22, 38) over semiconductor material (16), the at least one gate structure comprising an active layer (20), a gate metal (38) extending from the active layer and a sidewall spacer (34) on sidewalls of the gate metal; and a field plate (26) aligned with the at least one gate structure and isolated from the gate metal by the sidewall spacer.

公开(公告)号：EP4340025A1

公开(公告)日：2024-03-20

申请号：EP23186567.6

申请日：2023-07-20

Applicant: GlobalFoundries U.S. Inc.

Inventor： AJAY, . ,  JAIN, Ruchil Kumar ,  MAHAJAN, Prantik ,  ZAKA, Alban

IPC: H01L27/02 ,  H01L29/87

Abstract: Structures for a silicon-controlled rectifier and methods of forming same. The structure comprises a first well, a second well, and a third well in a semiconductor substrate. The third well is positioned between the first well and the second well. A first terminal includes a first doped region in the first well, and a second terminal includes a second doped region in the second well. The first well, the second well, and the second doped region have a first conductivity type, and the third well and the first doped region have a second conductivity type opposite to the first conductivity type. The structure further comprises a third doped region in the third well. The third doped region includes a first segment and a second segment, and the first segment is separated from the second segment by a portion of the first well and a portion of the third well.

公开(公告)号：EP4325188A2

公开(公告)日：2024-02-21

申请号：EP23181591.1

申请日：2023-06-27

Applicant: GlobalFoundries U.S. Inc.

Inventor： ZHAO, Zhixing ,  CHEN, Yiching ,  RESTREPO, Oscar D.

IPC: G01K7/16 ,  H01L23/34

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to built-in temperature sensors and methods of manufacture. The structure includes: at least one active gate structure; and a built-in temperature sensor adjacent to and on a same device level as the at least one active gate structure, the built-in temperature sensor further includes force lines and sensing lines.

公开(公告)号：EP4310561A1

公开(公告)日：2024-01-24

申请号：EP23180505.2

申请日：2023-06-21

Applicant: GlobalFoundries U.S. Inc.

Inventor： BIAN, Yusheng

IPC: G02B6/125 ,  G02B6/12

Abstract: Structures for a waveguide crossing and methods of fabricating a structure for a waveguide crossing. The structure comprises a first waveguide core and a second waveguide core each including a first section, a second section, and a first waveguide bend connecting the first section to the second section. The second section terminates the first waveguide core. The second section terminates the second waveguide core. The second waveguide bend has a side surface that is spaced from a side surface of the first waveguide bend by a gap. A third waveguide core is terminated by a section having an overlapping arrangement with the second section of the first waveguide core. A fourth waveguide core is terminated by a section having an overlapping arrangement with the second section of the second waveguide core.

公开(公告)号：EP4286905A1

公开(公告)日：2023-12-06

申请号：EP22200734.6

申请日：2022-10-11

Applicant: GlobalFoundries U.S. Inc.

Inventor： Bian, Yusheng

IPC: G02B6/12 ,  G02B6/293 ,  G02B6/30

Abstract: Structures including a ring resonator (12,14,26,28) and methods of fabricating a structure including a ring resonator (12,14,26,28). The structure comprises an optical component (20), a first ring resonator positioned (26,28) adjacent to the optical component (20), and a second ring resonator (12,14) spaced in a vertical direction from the first ring resonator (26,28). The first ring resonator (26,28) and the second ring resonator (12,14) have an overlapping relationship.

公开(公告)号：EP4276911A1

公开(公告)日：2023-11-15

申请号：EP22200713.0

申请日：2022-10-11

Applicant: GlobalFoundries U.S. Inc.

Inventor： PANDEY, Shesh Mani ,  JAIN, Vibhor ,  HOLT, Judson R.

IPC: H01L29/08 ,  H01L21/331 ,  H01L29/737 ,  H01L29/10 ,  H01L29/417

Abstract: A structure comprising: a subcollector under a buried insulator layer; a collector above the subcollector; a base within the buried insulator layer; an emitter above the base; and contacts to the subcollector, the base and the emitter.

公开(公告)号：EP4254510A1

公开(公告)日：2023-10-04

申请号：EP22200196.8

申请日：2022-10-07

Applicant: GlobalFoundries U.S. Inc.

Inventor： Singh, Jagar

IPC: H01L29/78 ,  H01L21/336

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a laterally diffused metal-oxide semiconductor with one or more gate contacts and methods of manufacture. The structure includes: sidewall spacers over a semiconductor substrate; and a gate structure within a space defined by the sidewall spacers. The gate structure includes: a plurality of gate materials over the semiconductor substrate and between the sidewall spacers; and a gate electrode over the plurality of gate materials and contacting the sidewall spacers.