公开(公告)号：JPH08139724A

公开(公告)日：1996-05-31

申请号：JP26589194

申请日：1994-10-28

Applicant: KOREA ELECTRONICS TELECOMM ,  KOREA TELECOMMUNICATION

Inventor： KIMU JIYON ON

IPC: H04Q3/00 ,  H04L12/28 ,  H04L12/42

Abstract: PURPOSE: To provide a transmission/reception device connecting the same function modules following the user-network interface standard of a wide band integrated information communication network which CCITT being an international standard mechanism recommends with two ring-like transmission mediums. CONSTITUTION: A transmission device 1-1 and a reception device 1-2 are provided and they are connected to the two physical ring-like transmission mediums. The transmission directions of the two transmission mediums are respectively opposite. The transmission device 1-1 inputs the eight bits unit self-cell of various characteristics which are made into multiple images and the 32 bits unit detour cells at the other destinations, which are received from the two rings. Transmission data is transmitted to one selected ring in the two rings by using FIFO memories which mutually differ. Data processing time when the inputted self-cell and the detour cell are independently processed and standby time in the FIFO memory are reduced to a minimum, the transmission of the detour cell is especially preferentially processed from the self-cell and cell transmission delay on the ring is maintained to a minimum.

公开(公告)号：JPH08136777A

公开(公告)日：1996-05-31

申请号：JP24783994

申请日：1994-10-13

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： KIYOU EISHIYAKU ,  YANAGI SHIYOUGEN ,  HAKU SHIYOUKUN

IPC: G02B6/35 ,  G02B6/00 ,  G02B6/44 ,  H02G1/06 ,  H02G9/10

Abstract: PURPOSE: To prevent the motion of an inner pipe in a duct formed inside a manhole, and further prevent the repeated expansion and contraction of the inner pipe due to a temperature change, and the occurrence of the phenomenon of the inner pipe being drawn into the outer pipe from the internal space of the manhole by providing a motion preventing means for preventing the motion of the inner pipe, and a pipe plug fixing device for preventing the separation from the outer pipe. CONSTITUTION: The joint of a base plate 9 and an inner pipe frame 8 can be tightened with a joint member, or the base plate 9 and the inner pipe frame 8 can be integrated with each other. Also, a preventive part is provided on one opposite end of the inner pipe frame 8 with the base plate 9 jointed. Also, the base plate 9 and a pipe plug 1 are jointed to each other by coupling a fixing nut 12 to a set bolt 2. In this case, when the fixing nut 12 coupled to the set bolt 2 is made to firmly adhere thereto, a water stop rubber 6 at the center of the pipe plug 1 radially expands, and the pipe plug 1 internally adheres to an outer pipe in a radial direction. thereby preventing the separation of the pipe plug 1 from the outer pipe.

公开(公告)号：JPH08130310A

公开(公告)日：1996-05-21

申请号：JP30790394

申请日：1994-12-12

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： KIYOU GENKIYUU ,  KIYOU SEIGEN ,  KIN JIYOKAN ,  YANAGI SHIYOUZEN

IPC: H01L29/78 ,  H01L21/336 ,  H01L27/08 ,  H01L29/10 ,  H01L29/423

Abstract: PURPOSE: To prevent the effect of a short channel that is a problem being generated from a MOS element where the length of a channel becomes short owing to the high integration of an integrated circuit, the increase in resistance of a source and a drain, and the decrease in the reliability of an element due to, for example, the junction breakdown caused by a metal wiring and an electromigration. CONSTITUTION: A gate electrode 9 in a groove form or in other forms is formed between a gate electrode 4 and a source/drain 7 for securing the depth of the junction of the source and drain that are as deep as the depth of the groove. Therefore, by injecting an impurity with a specific concentration below a gate electrode in groove structure and adjusting the concentration of the impurity, electrical characteristics such as a threshold voltage and a leakage current can be adjusted.

公开(公告)号：JPH0886939A

公开(公告)日：1996-04-02

申请号：JP29768294

申请日：1994-11-30

Applicant: FUMEI ,  KOREA ELECTRONICS TELECOMM

Inventor： TEI MEIEI ,  YASU SHIYOUKOU ,  ZEN GOKON ,  SAI TAIKIYUU

IPC: G02B6/36 ,  G02B6/24 ,  G02B6/38

Abstract: PURPOSE: To provide the optical connector of low loss at low cost. CONSTITUTION: While utilizing elastic body deforming energy provided in a polymer material (elastic body ferrule) 31, the top end face of an optical fiber 40 is tightly contacted with the top end face of another optical fiber 40. Thus, the loss at a connection part is minimized. In order to prevent the position deviation between the top end faces, the contact is performed through a precisely worked line-up element 30. The line-up element 30 is provided at an adapter, and the elastic body ferrule 31 and the optical fiber 40 are provided at a plug. By utilizing the line-up element 30, the easiness and economicity of assembly can be improved and the loss is reduced.

公开(公告)号：JPH0845965A

公开(公告)日：1996-02-16

申请号：JP11756695

申请日：1995-05-16

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： RI SHIYOURAN ,  KIN KAISEN ,  BUN SAIKIYOU ,  BOKU KIYOUBO

IPC: H01L29/812 ,  H01L21/338 ,  H01L21/76 ,  H01L21/8252 ,  H01L29/10 ,  H01L29/45

Abstract: PURPOSE: To make it possible to prevent flowing of a parasitic carrier in an interface between a substrate and a buffer layer into a channel layer. CONSTITUTION: First GaAs buffer layer 10A without being doped is formed on a semi-insulation GaAs substrate 70, a superlattice layer 80 is formed on the first GaAs buffer layer 10A, the second GaAs buffer layer 10B made of the same material as the first GaAs buffer layer is formed on the superlattice layer 80 without being doped, a channel layer 20 is formed on the second GaAs buffer layer 10B, and a surface protection film 30 is formed on the channel layer 20.

公开(公告)号：JPH089371A

公开(公告)日：1996-01-12

申请号：JP4091495

申请日：1995-02-28

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： IN SHIYOUSEI ,  RI SOUKUN

IPC: G06F13/00 ,  H04J3/06 ,  H04J3/22 ,  H04L7/04 ,  H04L7/08 ,  H04N5/04 ,  H04N19/00 ,  H04N19/423 ,  H04N19/436 ,  H04N19/68 ,  H04N19/91 ,  H04N7/24

Abstract: PURPOSE: To increase a for-reaching effect by re-synchronizing a code at high speed by using a parallel processing pattern matching when a transmission error occurs in a received variable length code. CONSTITUTION: An input bit string is linked with a barrel shift 12 through an input buffer 10, a latch 11 and these are coupled with an accumulator 14 linked with a PLA 13. The bit string is stored in the latch 11 and the bit string obtained by transferring the present bit string is outputted in the shift 12. Amount of transfer at the next state of the present bit string is calculated at the PLA 13, furthermore, a matching signal is outputted when a character string to be calculated and the pattern matching are not matched and the amount of transfer of the shift 12 is stored by storing transfer of the bit string at the next state when the matching fails in the accumulator 14. A signal is transmitted to the buffer 10 when the matching signal is larger than the amount of transfer of the shift 12 and the bit string at the next state is inputted. Specifically, the present bit string with O to N numbers of bit strings is transmitted to the PLA 13 through the shift 12 and a synchronizing signal is exactly searched.

公开(公告)号：JPH07294968A

公开(公告)日：1995-11-10

申请号：JP31295394

申请日：1994-12-16

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： CHIN SHIYUKUI ,  SAI EIKAN ,  KEN GOKIN ,  RI KAZUTSUNE

IPC: G02F1/35 ,  G02F3/02 ,  H01L29/15 ,  H01S5/00 ,  H01S3/18

Abstract: PURPOSE: To enable application to a long wavelength optical switch element by optimizing material constitution and structure by investigating the light absorbing characteristics of InGaAsP/InP as four-component mixed material structure. CONSTITUTION: This method finds out optimized structure for maximizing the ratio of light absorption and output strength by operating the wavelength area of 1.55μm as an area for applying the minimum loss value of optical fibers, by adjusting the component ratio and structure of InGaAsP/InP mixed structure. In addition the maximized value of a maximum light absorption value caused by a heavy holeexciting element at the time of generating no electric field is provided by utilizing a parameter (γ) for finding out optimized structure of InP four-component mixed material. For example, the optimized structure for maximizing the light absorption effect of the exciting element by changing (x) and (y) molar fractions and well width of In1-x Gax Asy P1-y /InP material structure to be utilized for an optical bistable switch element is determined, by using the parameter ρ=[α((0)-α(F)]/α(F) (α is a light absorption coefficient and F is the size of electric field in this case).

公开(公告)号：JPH07262130A

公开(公告)日：1995-10-13

申请号：JP30400294

申请日：1994-12-07

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： KIN GENKI ,  SHIN YOKUKON ,  TEI KASAI ,  RI MAKOTO

IPC: G06F3/00 ,  G06F3/14 ,  G06F13/36 ,  G06T9/00 ,  G09G5/00 ,  G10L19/00 ,  H04N7/10 ,  H04N7/14 ,  H04N19/00 ,  H04N19/27 ,  H04N19/42 ,  H04N19/423 ,  H04N19/50 ,  H04N19/85 ,  H04N21/439 ,  H04N21/4402 ,  G10L9/18 ,  H04N7/24

Abstract: PURPOSE: To simultaneously process multimedia data at a high speed from a board on which audio, video, and graphics functions are integrated by utilizing a PCI local bus by providing a video unit, an audio unit, a graphics unit, and a host interface unit. CONSTITUTION: An audio unit performs sound recording and reproduction, audio data compression/elongation, and sound source synthesization. A video unit B inputs the analog signals of still pictures or moving pictures, compresses/ elongates the signals in real time, and outputs the results to a monitor 6. A graphics unit C has a picture outputting function and a graphic processing function and is constituted of a graphics accelerator 9 for a PCI bus, a graphics memory 7, a RAMDAC 8, etc. A host interface unit D transmits and receives multimedia data at high speeds by using the PCT bus which is constituted by introducing a high-speed local bus concept to a host bus.

公开(公告)号：JPH07203497A

公开(公告)日：1995-08-04

申请号：JP29323894

申请日：1994-11-28

Applicant: KOREA ELECTRONICS TELECOMM ,  KOREA TELECOMMUNICATION

Inventor： RIYU CHIYAN HOYON ,  RI BOYON SON ,  KIMU YON SHI

IPC: H04M3/36 ,  H04M7/00 ,  H04M15/00 ,  H04Q3/545

Abstract: PURPOSE: To obtain a stable system state by controlling the priority order of a call. CONSTITUTION: A subscriber's line, trunk line, signal equipment, tone equipment, and time (T) switch for setting a call are mounted on an alignment switching processor ASP 1. A concentratedly operated system connecting network processor INP 2 taking charge of the connection of space switches, a number translation processor NTP 3 taking charge of number translation, and an operation and maintenance processor OMP 4 taking charge of the calculation and storage of charges are mounted. Magnetic tape drives MT for storing charge information and hard disk drivers DISK are mounted in the OMP 4. Therefore, an over load due to call traffic can be controlled so as to be discriminated from an over load generated due to operation maintenance software, and a capacity to be processed by a processor can be calculated and applied as necessary according to the over load state. Thus, the pausing time of a CPU can be reduced, the number of suppressed calls can be minimized, and a stable system state can be maintained.

公开(公告)号：JPH07202952A

公开(公告)日：1995-08-04

申请号：JP29152794

申请日：1994-11-25

Applicant: KOREA ELECTRONICS TELECOMM ,  KOREA TELECOMMUNICATION

Inventor： JOO BUM-SOON ,  LEE BUM-CHOL ,  KIM JUNG-SIK ,  KANG SUK-YUL

IPC: H04L25/40 ,  H03K5/135 ,  H03K5/15 ,  H03K5/1534 ,  H04L7/00 ,  H04L7/02 ,  H04L7/033 ,  H04L7/04

Abstract: PURPOSE: To execute more stable re-timing. CONSTITUTION: A local clock pulse FT generated by a local clock pulse generator 11 has a frequency which is six times that of the bit rate of inputted binary data D. A clock pulse parallel generator 12 successively delays an external input clock pulse CP at one period of local clock pulse FT. A data re-timing unit 16 re-times re-timing clock pulses in the center of data eye pattern, when seven delayed clock pulses CP1, CP2, CP3, CP4, CP5, CP6 and CP7 are generated and the delayed time of re-timing clock pulses in the selection process of re- timing clock pulse selector 15 is the same as the delay time of data DD compensated by a time delay compensator 16.