公开(公告)号：DE69224467T2

公开(公告)日：1998-06-10

申请号：DE69224467

申请日：1992-09-15

Applicant: ST MICROELECTRONICS SRL

Inventor： TOMASINI LUCIANO ,  CASTELLO RINALDO

IPC: H04M20060101 ,  H04M1/00 ,  H04M1/60 ,  H04M1/76 ,  H04M19/08

Abstract: A circuit is described which comprises an operational amplifier A, two resistors R1, R2, connected between the telephone line L and the inputs of the amplifier, a capacitor C, which is charged by a first bipolar transistor P1 controlled by the amplifier via a first FET transistor M1, a second bipolar transistor P2 arranged in parallel with the connection of the first transistor P1 and the capacitor C, a second FET transistor M2, equal to the first and with "source" and "gate" terminals connected to the corresponding terminals of the first one, and two current generators CC1, CC2, connected to the "drain" terminals, respectively, of the first and the second FET transistor and to the bases, respectively, of the first and the second bipolar transistor P1, P2. The currents I1, I2 of the two generators and the other parameters of the circuit are such as to keep the first and the second bipolar transistor respectively conducting and inhibited, except in the case when the line voltage drops below a minimum predetermined value: in such case, the first and the second transistor respectively switch to inhibition and conduction. The circuit has a lower "voltage loss" than the known circuits.

公开(公告)号：DE69223318T2

公开(公告)日：1998-03-19

申请号：DE69223318

申请日：1992-07-29

Applicant: ST MICROELECTRONICS SRL

Inventor： TOMASINI LUCIANO ,  CASTELLO RINALDO

IPC: H03F1/34 ,  H03H7/06 ,  H03H11/04 ,  H03H11/12 ,  H04M1/00

公开(公告)号：DE60103691D1

公开(公告)日：2004-07-15

申请号：DE60103691

申请日：2001-01-15

Applicant: ST MICROELECTRONICS SRL

Inventor： PISATI VALERIO ,  PORTALURI SALVATORE ,  CAZZANIGA MARCO ,  CASTELLO RINALDO

IPC: H03F1/42 ,  H03H11/04

Abstract: This invention relates to a circuit structure of the feedforward type with programmable zeroes, particularly for synthesizing time-continual filters. This structure comprises a pair of amplification cells (14,15) interconnected at at least one interconnection node (A) and connected between a first signal (Vin) input (IN) of a first cell (14) and an output terminal (U) of the second cell (15, each cell (14,15) comprising a pair of transistors (10,2;6,7) which have a conduction terminal in common and have the other conduction terminals coupled respectively to a first voltage reference (Vcc) through respective bias members (3,4;9,11). The structure further comprises a circuit leg (13) connecting a node (X) of the first cell (14) to the output terminal (U) and comprising a transistor (8) which has a control terminal connected to the node (X) of the first cell (14), a first conduction terminal connected to the output terminal (U), and a second conduction terminal coupled to a second voltage reference (GND) through a capacitor (Cc). Thus, a released "zero" can be introduced in the right semiplane of the pole-zero complex plane to improve the flattening of group gain.

公开(公告)号：IT1315805B1

公开(公告)日：2003-03-26

申请号：ITRM20000032

申请日：2000-01-20

Applicant: ST MICROELECTRONICS SRL

Inventor： TOMASINI LUCIANO ,  GUINEA JESUS ,  CASTELLO RINALDO

IPC: G05F3/24 ,  G05F3/26

Abstract: The generator includes complementary MOS transistors interconnected in four circuit branches one of which contains a constant-current generator. Voltages picked up at various nodes of the circuit can be used as reference and/or biasing voltages of the integrated circuit, which account for the variability of the manufacturing parameters.

公开(公告)号：IT1313381B1

公开(公告)日：2002-07-23

申请号：ITVA990005

申请日：1999-02-22

Applicant: ST MICROELECTRONICS SRL

Inventor： MILANESE CARLO MARIA ,  CASTELLO RINALDO

IPC: H03K3/3565 ,  H03K5/24

Abstract: A comparator circuit includes a differential input stage, a second differential stage having a differential output, and an output stage transforming an output signal from the differential output of the second differential stage into an output signal having a logic level. The comparator further includes a common mode measuring stage. The common mode measuring stage includes a differential pair of input transistors and a differential pair of complementary transistors biased by respective current generators, and a current mirror summing the differential output currents of the two complementary transistors pairs into a single output current signal. A switching stage is controlled by the differential output nodes of the second differential stage. A common source node of the switch stage is coupled to the output of the common mode measuring stage and to the differential output nodes of the differential input stage.

公开(公告)号：DE69521197T2

公开(公告)日：2001-11-08

申请号：DE69521197

申请日：1995-04-11

Applicant: ST MICROELECTRONICS SRL

Inventor： TOMASINI LUCIANO ,  CASTELLO RINALDO ,  BIETTI IVAN ,  CLERICI GIANCARLO

IPC: H04B1/58 ,  H04M1/58 ,  H04M1/76 ,  H04M1/00

Abstract: The speech circuit described matches the impedance of the telephone line by synthesizing a complex impedance by means of a positive feedback loop comprising a single resistor (11) and cancels out the side tone by means of a subtracter (20') which extracts from the signal (Va) coming from the line a signal (Vb) correlated to the signal to be transmitted. In order to achieve cancellation of the side tone unaffected by the noise produced in the circuits for synthesizing the impedance, the signal (Vb) correlated to the signal to be transmitted is derived by processing the signal present in the resistor (11) at the output of the feedback loop.

公开(公告)号：ITRM20000032A1

公开(公告)日：2001-07-20

申请号：ITRM20000032

申请日：2000-01-20

Applicant: ST MICROELECTRONICS SRL

Inventor： TOMASINI LUCIANO ,  GUINEA JESUS ,  CASTELLO RINALDO

IPC: G05F3/24 ,  G05F3/26

Abstract: The generator includes complementary MOS transistors interconnected in four circuit branches one of which contains a constant-current generator. Voltages picked up at various nodes of the circuit can be used as reference and/or biasing voltages of the integrated circuit, which account for the variability of the manufacturing parameters.

公开(公告)号：DE69521197D1

公开(公告)日：2001-07-12

申请号：DE69521197

申请日：1995-04-11

Applicant: ST MICROELECTRONICS SRL

Inventor： TOMASINI LUCIANO ,  CASTELLO RINALDO ,  BIETTI IVAN ,  CLERICI GIANCARLO

IPC: H04B1/58 ,  H04M1/58 ,  H04M1/76 ,  H04M1/00

Abstract: The speech circuit described matches the impedance of the telephone line by synthesizing a complex impedance by means of a positive feedback loop comprising a single resistor (11) and cancels out the side tone by means of a subtracter (20') which extracts from the signal (Va) coming from the line a signal (Vb) correlated to the signal to be transmitted. In order to achieve cancellation of the side tone unaffected by the noise produced in the circuits for synthesizing the impedance, the signal (Vb) correlated to the signal to be transmitted is derived by processing the signal present in the resistor (11) at the output of the feedback loop.

公开(公告)号：DE69231151T2

公开(公告)日：2001-02-15

申请号：DE69231151

申请日：1992-08-26

Applicant: ST MICROELECTRONICS SRL

Inventor： CASTELLO RINALDO ,  ALINI ROBERTO ,  REZZI FRANCESCO ,  PISATI VALERIO

IPC: H03F1/32 ,  H03F3/45 ,  H03H11/04

公开(公告)号：ITTO20000493D0

公开(公告)日：2000-05-26

申请号：ITTO20000493

申请日：2000-05-26

Applicant: ST MICROELECTRONICS SRL

Inventor： BASCHIROTTO ANDREA ,  CUSINATO PAOLO ,  MONTAGNA GIAMPIERO ,  CASTELLO RINALDO

IPC: H03F3/00 ,  H03F3/45

Abstract: A switched operational amplifier with fully differential topology, alternately switchable on and off, and a control circuit. The operational amplifier has a first differential output (4a) and a second differential output, and a control terminal. The control circuit includes a capacitive detecting network including a first capacitor and a second capacitor connected between the first and second differential outputs and a common-mode node, and a third capacitor connected between the common-mode node and ground in a first operative condition, and between the common-mode node and the supply voltage in a second operative condition. A control transistor is connected between the common-mode node and the control terminal of the operational amplifier and supplies a control current correlated to the voltage on the common-mode node. A switchable voltage source, connected to the common-mode node, supplies a desired voltage in a first operative condition, when the operational amplifier is off.