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    Wiring board and manufacturing method therefor
    51.
    发明授权
    Wiring board and manufacturing method therefor 失效
    接线板及其制造方法

    公开(公告)号：US07516542B2

    公开(公告)日：2009-04-14

    申请号：US11254312

    申请日：2005-10-19

    Applicant: Koji Temba

    Inventor： Koji Temba

    IPC: H05K3/36

    CPC classification number: H01L21/485 ,  H01L23/5382 ,  H01L2924/0002 ,  H05K1/0287 ,  H05K1/0289 ,  H05K3/328 ,  H05K2201/09681 ,  H05K2201/09945 ,  H05K2203/175 ,  Y10T29/49126 ,  Y10T29/49155 ,  H01L2924/00

    Abstract: A wiring board is manufactured by a step of forming a meshy cylindrical body, where plural conductive rings are connected to each other at plural positions in the respective peripheral direction, a step of forming laminated meshy sheets, by squashing the meshy cylindrical body in the radial direction, a step of inserting an insulation sheet between the meshy sheets, and a step of forming lacking portions at a position in the peripheral direction of conductive rings of the meshy sheets. It becomes possible to directly join a semiconductor chip to the conductive ring of the meshy sheet, and therefore, a wiring circuit can be obtained without using a solder joint.

    Abstract translation: 通过形成网状圆柱体的步骤制造布线板，其中多个导电环在各个周向的多个位置处彼此连接，通过在径向上挤压网状圆柱体而形成叠层网状片的步骤 方向，在网状片材之间插入绝缘片的步骤，以及在网状片材的导电环的周向的位置处形成缺损部分的步骤。 可以将半导体芯片直接接合到网状片的导电环上，因此可以在不使用焊点的情况下获得布线电路。

    Anisotropically conductive film
    54.
    发明申请
    Anisotropically conductive film 审中-公开
    各向异性导电膜

    公开(公告)号：US20030178221A1

    公开(公告)日：2003-09-25

    申请号：US10369793

    申请日：2003-02-20

    Inventor： Cindy Chia-Wen Chiu ,  Hsiao Ken Chuang

    IPC: H01B007/00

    CPC classification number: H01B1/22 ,  H05K3/323 ,  H05K2201/0129 ,  H05K2201/0133 ,  H05K2201/0195 ,  H05K2201/09945 ,  H05K2201/10234

    Abstract: An anisotropically conductive structure for providing electrical interconnection between electronic components, and the process for making such anisotropically conductive structure. The anisotropically conductive structure includes a dielectric matrix having a substantially uniform thickness; and a plurality of conductive elements embedded in the dielectric matrix.

    Abstract translation: 用于提供电子部件之间的电互连的各向异性导电结构以及制造这种各向异性导电结构的方法。 各向异性导电结构包括具有基本上均匀厚度的介电矩阵; 以及嵌入介质矩阵中的多个导电元件。

    Integrated circuit packaging apparatus and method
    56.
    发明授权
    Integrated circuit packaging apparatus and method 失效
    集成电路封装设备及方法

    公开(公告)号：US6126063A

    公开(公告)日：2000-10-03

    申请号：US911515

    申请日：1997-08-14

    Applicant: Sutee Vongfuangfoo ,  Minh Vuong ,  Brent R. Bacher

    Inventor： Sutee Vongfuangfoo ,  Minh Vuong ,  Brent R. Bacher

    IPC: B23K3/06 ,  H01L21/48 ,  H05K3/34 ,  B23K1/00

    CPC classification number: H05K3/3478 ,  B23K3/0638 ,  H01L21/4853 ,  H05K2201/09945 ,  H05K2203/0113 ,  H05K2203/0338 ,  H05K2203/041

    Abstract: Apparatus and method for assembling solder balls in a selected one of several different patterns for delivery to connector pads on an integrated circuit package, or other receiver, includes a universal template containing holes at locations in an aggregate pattern of all hole locations for the several different patterns, and includes a subtemplate for each individual different pattern that contains posts at locations for insertion from the rear of the template into holes therein at locations where no surface recess is desired. The universal template may remain aligned with an assembly jig or holder of packages while only the subtemplate is changed to change the surface pattern of holes into which solder balls may then be distributed.

    Abstract translation: 用于组装多个不同图案中所选择的一种中的焊球的装置和方法用于传送到集成电路封装或其它接收器上的连接器焊盘，其包括通用模板，其在位于所述多个不同位置的所有孔位置的集合图案中的位置处 并且包括用于每个单独不同图案的子模板，其在位置处的位置处用于从模板的后部插入到其中不需要表面凹槽的位置处的孔中。 通用模板可以与组装夹具或包装保持器保持一致，而仅改变子模板以改变可以分布焊料球的孔的表面图案。

    Field programmable circuit module
    58.
    发明授权
    Field programmable circuit module 失效
    现场可编程电路模块

    公开(公告)号：US5640308A

    公开(公告)日：1997-06-17

    申请号：US560154

    申请日：1995-11-17

    Applicant: Robert Osann, Jr. ,  George A. Shaw, Jr. ,  Amr M. Mohsen

    Inventor： Robert Osann, Jr. ,  George A. Shaw, Jr. ,  Amr M. Mohsen

    IPC: H01L23/538 ,  H05K1/00 ,  H05K1/11 ,  H05K7/02 ,  H01L29/00

    CPC classification number: H01L23/5382 ,  H05K1/0289 ,  H01L2224/49171 ,  H01L2924/10253 ,  H05K1/112 ,  H05K2201/09945 ,  H05K2201/10689 ,  H05K2203/175

    Abstract: The invention uses a programmable interconnect substrate having a plurality of conductive and interconnectable vias located on one or both surfaces thereof. A customized pattern of bonding pads is then formed over the one or both surfaces of the substrate which correspond to the terminal footprints of specific surface mounted packages intended to be mounted on the substrate. A generalized pattern of bonding pads may also be formed on the surfaces of the substrate for electrically connecting terminals of bare dice thereto by means of thin wire. All bonding pads are electrically connected to one or more vias by direct electrical contact or by a conductive trace extending from the bonding pad to a nearby via.

    Abstract translation: 本发明使用具有位于其一个或两个表面上的多个导电和互连通孔的可编程互连基板。 然后在衬底的一个或两个表面上形成定制的接合焊盘图案，其对应于期望安装在衬底上的特定表面安装封装的端子脚印。 也可以在基板的表面上形成接合焊盘的一般化图案，用于通过细线电连接裸裸片的端子。 所有接合焊盘通过直接电接触或通过从接合焊盘延伸到附近的通孔的导电迹线电连接到一个或多个通孔。

    Multilayer thin-film wiring board
    59.
    发明授权
    Multilayer thin-film wiring board 失效
    多层薄膜接线板

    公开(公告)号：US5608192A

    公开(公告)日：1997-03-04

    申请号：US506918

    申请日：1995-07-26

    Applicant: Kiyokazu Moriizumi ,  Kiyotaka Seyama

    Inventor： Kiyokazu Moriizumi ,  Kiyotaka Seyama

    IPC: H05K3/46 ,  H01L23/12 ,  H01L23/538 ,  H05K1/00 ,  H05K1/03 ,  H05K3/42

    CPC classification number: H01L23/5386 ,  H01L23/5384 ,  H05K1/0287 ,  H01L2924/0002 ,  H05K1/0289 ,  H05K1/0298 ,  H05K1/0306 ,  H05K2201/09454 ,  H05K2201/09945 ,  H05K2203/061 ,  H05K3/429 ,  H05K3/4644 ,  H05K3/467

    Abstract: A multilayer thin-film wiring board formed by laminating at least three wiring layers including first, second, and third wiring layers together with a dielectric layer. The first wiring layer includes a first pattern having a plurality of first windows arranged with the same pitch both in a lateral direction and in a longitudinal direction of the wiring board, and a plurality of first island patterns each located at a substantially central portion of each first window. Similarly, the second wiring layer includes a second pattern having a plurality of second windows, and a plurality of second island patterns each located at a substantially central portion of each second window. The second windows are shifted from the first windows by half the pitch both in the lateral direction and in the longitudinal direction. The third wiring layer includes first and second via pads formed on a surface of the wiring board. The first via pad, the first pattern, and at least one of the second island patterns are connected together by a first via. The second via pad, the second pattern, and at least one of the first island patterns are connected together by a second via.

    Abstract translation: 通过将包括第一，第二和第三布线层的至少三个布线层与电介质层层叠而形成的多层薄膜布线板。 第一布线层包括第一图案，其具有在布线板的横向和纵向方向上以相同的间距布置的多个第一窗口，以及多个第一岛状图案，每个第一窗口位于每个第一窗口的大致中央部分 第一窗口 类似地，第二布线层包括具有多个第二窗口的第二图案和分别位于每个第二窗口的大致中心部分的多个第二岛状图案。 第二窗口在横向和纵向方向上从第一窗口偏移了一半的距离。 第三布线层包括形成在布线板的表面上的第一和第二通孔焊盘。 第一通孔焊盘，第一图案以及第二岛状图案中的至少一个通过第一通孔连接在一起。 第二通孔焊盘，第二图案以及第一岛状图案中的至少一个通过第二通孔连接在一起。

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