公开(公告)号：JP2001035860A

公开(公告)日：2001-02-09

申请号：JP2000179287

申请日：2000-06-15

Applicant: IBM ,  INFINEON TECHNOLOGIES CORP

Inventor： GRUENING ULRIKE ,  KARL J REEDENSU

IPC: H01L27/108 ,  H01L21/02 ,  H01L21/336 ,  H01L21/8234 ,  H01L21/8242 ,  H01L27/088 ,  H01L29/78

Abstract: PROBLEM TO BE SOLVED: To solve the problems associated with strap formation (e.g. conductive connection between a storage device and the gate-drain of a transistor) by connecting a transistor electrically with a storage capacitor through the outward diffusion region of a conductive strap. SOLUTION: A conductive strap 800 extends laterally from a vertical storage capacitor 103. A channel region 1300 is located on the outside of the vertical storage capacitor 103 and extending along a vertical surface shifted laterally therefrom. In the operation, the voltage on one gate conductor of a gate conductor stack causes to conduct a P well adjacent to a step part 1300 in a substrate to form a connection between two diffusion regions (e.g. source and drain). In the process, electrical connection is made between the contact bit line and the storage device 103 through a vertical transistor formed along the strap 1300 through the strap 800.

公开(公告)号：JP2001035841A

公开(公告)日：2001-02-09

申请号：JP2000173200

申请日：2000-06-09

Applicant: IBM ,  INFINEON TECHNOLOGIES CORP

Inventor： AKATSU HIROYUKI ,  DAVID E KOTEKKI ,  SHINGYU JENNIE RYAN ,  SHEN HUA

IPC: H01L21/308 ,  C04B41/53 ,  C04B41/91 ,  H01L21/311 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/108

Abstract: PROBLEM TO BE SOLVED: To obtain production rate which enables commercial use by exposing a ferrodielectric film to mixture of hydrogen chloride and acid and heating the mixture in a specified temperature range. SOLUTION: A substrate having a ferrodielectric film is exposed to solution of hydrogen chloride and acid, and the solution is heated to a temperature between 30 deg.C and 90 deg.C. Wet etching process solution provides BSTO etching rate which is 30 times faster than a usual etching method and it etches titanium nitride and silicon oxide just a little. Etching rate of BSTO increases when a temperature of solution rises toward 70 deg.C, and this fact is important. Although at 50 deg.C, etching rate is about 100 Å/minute, at 70 deg.C, etching rate rises to 600 Å/minute or more. Etching rate of silicon oxide remains low at any temperature.

公开(公告)号：JP2001013670A

公开(公告)日：2001-01-19

申请号：JP2000160870

申请日：2000-05-30

Applicant: IBM ,  INFINEON TECHNOLOGIES CORP

Inventor： SHAHIDO BUTTO ,  KAMIZU FARAHAPUURU ,  HAFFNER HENNING ,  MARK A RABIN ,  LAAS W LIEBMANN ,  DONALD J SAMUELS

IPC: G03F1/36 ,  G03F1/68 ,  G03F1/70 ,  G06F17/50 ,  H01L21/027 ,  G03F1/08

Abstract: PROBLEM TO BE SOLVED: To provide a method for enhancing the efficiency of the proximity correction of a pattern forming process in terms of given chip layout design, and constitution therefor. SOLUTION: This method includes a step G01 for describing the pattern forming process in accordance with at least one layout parameter, a step G03 for making the distribution of at least one parameter discrete, a step G05 for providing an error correction table linking the correction of layout with at least one parameter and a step G06 for correcting the layout by applying correction in the table to the layout at least once.

公开(公告)号：JP2000353750A

公开(公告)日：2000-12-19

申请号：JP2000144824

申请日：2000-05-17

Applicant: IBM ,  INFINEON TECHNOLOGIES CORP

Inventor： BRINTZINGER AXEL ,  KIRIHATA TOSHIAKI ,  NARAYAN CHANDRASEKHAR

IPC: H01L21/82 ,  H01H85/00 ,  H01L23/525 ,  H01H85/044

Abstract: PROBLEM TO BE SOLVED: To array a larger number of fuses densely by electrically connecting at least two fuses that contain a fusing part arrayed in a first level of a multi- layer semiconductor device, respectively. SOLUTION: Each fuse 13 contains a part 15 that is actually fused. The part 15 to be fused is arrayed in a first metal level M1. Like the other part of the fuse 13, the part 15 that is actually fused is made typically of a electrically conductive material, especially aluminum. A termination of each part 15 to be fused is connected to a connector bias 17 that connects that fuse 13 with a connector 19. A gate contact 23 is vertical to a direction of the fuse 13. The gate contact 23 can be connected to a ground that is common to all of existing fuse circuits. Therefore, fuse density is doubled without narrowing the fuse pitch.

公开(公告)号：JP2000353660A

公开(公告)日：2000-12-19

申请号：JP2000132555

申请日：2000-05-01

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： SCHULZE STEFFEN ,  FRANZ ZACHA

IPC: G03F1/08 ,  G03F7/20 ,  G03F7/22 ,  H01L21/027 ,  H01L23/544

Abstract: PROBLEM TO BE SOLVED: To satisfactorily deal with the problem of wafer edge by printing a first pattern in a wafer area where no edge effect is anticipated and printing an enlarged pattern in an area where more tendency of influence of the effect is anticipated. SOLUTION: A frame 31 of a reticle 30 is used for supporting a patterned mask which forms a main section 32 and two spare sections 34A and 34B. The main section 32 corresponds to a fully functional square area and prints a first pattern in an area which will not be influenced by any edge effect whatsoever. Also, it prints an enlarged pattern in non-functional edge area where likely influence of the effect is anticipated. In this way, the effect of nonuniformity can be improved and the problem of wafer edge can be dealt with satisfactorily.

公开(公告)号：JP2000332652A

公开(公告)日：2000-11-30

申请号：JP2000121293

申请日：2000-04-21

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： WILLIAM W JONES ,  KENNEY THOMAS J

IPC: H04B1/7115 ,  H04B7/005 ,  H04B7/02 ,  H04B7/08 ,  H04B7/26 ,  H04B1/707

Abstract: PROBLEM TO BE SOLVED: To optimize reception of a signal at a rake receiver by updating an estimation value of a traffic channel amplitude on the basis of comparison between a traffic channel amplitude estimation value and a pilot symbol from a single base station. SOLUTION: Two signals separated from a disturbance signal, that is, xt(n) of a traffic signal, xp(n) of a pilot signal and a signal from another base station through coordination are received from a single base station. The signal x, is supplied to a multiplier 50. Moreover, a conjugate of the signal xt is supplied to a multiplier 52. Then, a CDMA cellular signal is weighted by an estimation value, the weighted signal is synthesized with the CDMA cellular which is formed by another channel of the rake receiver and is separately weighted, and an estimation value of a traffic channel amplitude is updated on the basis of comparison between the traffic channel amplitude estimation value and a pilot symbol from the single base station.

公开(公告)号：JP2000330658A

公开(公告)日：2000-11-30

申请号：JP2000065508

申请日：2000-03-09

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： HOUGHTON RUSSELL J ,  STAHL ERNST J

IPC: G05F3/24 ,  G05F3/26 ,  H03F1/30

Abstract: PROBLEM TO BE SOLVED: To prevent an output current from being affected by variations of temperature and an external voltage source by adding two currents which are opposite in temperature coefficient and supplying the current. SOLUTION: The current source 10 has a band-gap reference circuit 12, supplies a temperature-dependent current IBGR increasing as the temperature rises, and also supplies a temperature-dependent voltage VBGR to one input side of an amplifier 14 in response to the current IBGR. The drain of an MOSFETT1 connected to the output side of this amplifier 14 is connected to the other input side of the amplifier 14 to constitute a negative feedback mechanism. Further, a current mirror part 26 outputs a variable power current nIBGR to an addition node in response to the current IBGR supplied in the circuit 12. The current IR derived by dividing the voltage VBGR by a positive temperature coefficient resistance R is also supplied to the addition node 22. Consequently, the current source 10 supplies an output current IREF=nIBDR+IR to the addition node 22 to eliminate the influence of variations of the temperature T and power source 18.

公开(公告)号：JP2000315782A

公开(公告)日：2000-11-14

申请号：JP2000123911

申请日：2000-04-25

Applicant: IBM ,  INFINEON TECHNOLOGIES CORP

Inventor： RUPP THOMAS S ,  DOBUZINSKY DAVID M ,  LU ZHIJIAN

IPC: H01L21/28 ,  H01L21/768 ,  H01L21/8239 ,  H01L21/8242 ,  H01L27/00 ,  H01L27/108

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device which has a stable contact resistance and also has an aligned maximum allowable contact region adapted to reduced fundamental dimensions. SOLUTION: A borderless contact 11 of giga-scale fundamental dimensions is spread in a direction perpendicular to word lines 14 (in a direction parallel to bit lines 16). Formation of a borderless contact structure of another square into a rectangular structure causes reduction of a step positional deviation, thus decreasing a contact resistance and keeping its uniformity. A maximum allowable contact region can be obtained even with a positionally shifted arrangement.

公开(公告)号：JP2000311991A

公开(公告)日：2000-11-07

申请号：JP2000080366

申请日：2000-03-22

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： TOBBEN DIRK ,  ALSMEIER JOHANN

IPC: H01L27/108 ,  H01L21/8242

Abstract: PROBLEM TO BE SOLVED: To obtain a method of forming a DRAM on a silicon chip, where an NMOSFET of a memory cell is provided in the center region of the silicon chip, a CMOSFET of a support circuit is provided in the peripheral region of the silicon chip. SOLUTION: A support circuit 100B is masked with an SiO2 film 20, and a polyside film 22 in a memory 100A is doped with N-type impurities. An SiN cap layer 26 is deposited thereon and covered with a patterned mask, the laminate is successively etched up to a gate insulating oxide film 12, a substrate 10 is doped with N-type impurities, and the source and drain region 32 of the memory 100A are formed. A sidewall dielectric spacer 34 is formed, and after an NMOSFET memory is nearly completed, a CMOSFET is formed in the supper circuit 100B.

公开(公告)号：JP2000310845A

公开(公告)日：2000-11-07

申请号：JP2000092102

申请日：2000-03-29

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： CARPI ENIO LUIZ ,  BESENBOCK WOLFGANG

IPC: G03F1/00 ,  G03F1/78 ,  G03F7/20 ,  H01L21/027 ,  G03F1/08

Abstract: PROBLEM TO BE SOLVED: To reduce corner rounding in a reticle production method and to lessen the need for an add-on structure in a reticule production process by using an elliptical cross-sectional surface-shaped edge of an energy beam for forming the corner of a pattern. SOLUTION: A mask 102 is mounted at a stage or positioner 106 or an equivalent positioning device. The stage 106 is capable of exactly positioning the mask 102 including its rotation. A lens system 104 is disposed in order to focus a laser/electron spot 112 formed by an energy source 110. The lens system 104 controls the size and shape of the spot used for forming the pattern on the mask 102. The laser/electron spot 112 formed to the elliptic shape is formed by using the lens system 104. The ellipticity of the beam is formed and controlled by the astigmatism of the lens system 104, by which its dimensions are changed.