公开(公告)号：KR100416602B1

公开(公告)日：2004-02-05

申请号：KR1020010047730

申请日：2001-08-08

Applicant: 삼성전자주식회사

Inventor： 김완돈 ,  유차영 ,  주재현 ,  원석준

IPC: H01L27/04

CPC classification number: H01L28/60 ,  H01L27/10852 ,  H01L28/55

Abstract: Methods for manufacturing a node of a stacked capacitor are provided. A first dielectric layer having a contact plug therein is formed on an integrated circuit substrate. A second dielectric layer including a storage node hole adjacent the contact plug is formed on the first dielectric layer. A conductive layer is deposited into the storage node hole and on the second dielectric layer. The conductive layer on the second dielectric layer is removed to provide a conductive storage node in the storage node hole. After the conductive layer on the second dielectric layer is removed, the conductive storage node is heat treated to reflow the conductive storage node before additional layers are formed on the conductive storage node.

Abstract translation: 提供了用于制造堆叠电容器的节点的方法。 其中具有接触插塞的第一介电层形成在集成电路衬底上。 包括与接触插塞相邻的存储节点孔的第二电介质层形成在第一电介质层上。 将导电层沉积到存储节点孔中和第二介电层上。 第二电介质层上的导电层被去除以在存储节点孔中提供导电存储节点。 在去除第二电介质层上的导电层之后，对导电存储节点进行热处理以在导电存储节点上形成附加层之前使导电存储节点回流。

公开(公告)号：KR1020040000656A

公开(公告)日：2004-01-07

申请号：KR1020020035172

申请日：2002-06-22

Applicant: 삼성전자주식회사

Inventor： 김완돈 ,  박순연 ,  유차영 ,  최재형 ,  정숙진

IPC: H01L27/108

Abstract: PURPOSE: A capacitor of a semiconductor device including an anti-oxidation layer and a fabricating method therefor are provided to prevent the oxidation of a contact plug by forming the anti-oxidation layer between a storage electrode and the contact plug. CONSTITUTION: A capacitor of a semiconductor device including an anti-oxidation layer includes a conductive contact plug(300), a storage electrode, an anti-oxidation layer(400), a dielectric layer(700), and a plate electrode(800). The conductive contact plug(300) is formed on an upper surface of a semiconductor substrate(100). The storage electrode is electrically connected to the conductive contact plug(300). The anti-oxidation layer(400) is used for insulating a boundary between the storage electrode and the conductive contact plug(300) and preventing the oxidation of the conductive contact plug(300). The dielectric layer(700) is formed on the storage electrode. The plate electrode(800) is formed on the dielectric layer(700).

Abstract translation: 目的：提供一种包括抗氧化层的半导体器件及其制造方法的电容器，以通过在存储电极和接触插塞之间形成抗氧化层来防止接触插塞的氧化。 构成：包括抗氧化层的半导体器件的电容器包括导电接触插塞（300），存储电极，抗氧化层（400），电介质层（700）和平板电极（800） 。 导电接触插塞（300）形成在半导体衬底（100）的上表面上。 存储电极电连接到导电接触插塞（300）。 抗氧化层（400）用于绝缘存储电极和导电接触插塞（300）之间的边界并防止导电接触插塞（300）的氧化。 电介质层（700）形成在存储电极上。 板电极（800）形成在电介质层（700）上。

公开(公告)号：KR1020020035080A

公开(公告)日：2002-05-09

申请号：KR1020020021685

申请日：2002-04-19

Applicant: 삼성전자주식회사

Inventor： 강창석 ,  황두섭 ,  유차영 ,  박영욱 ,  박홍배

IPC: H01L27/108

Abstract: PURPOSE: A method for fabricating a capacitor of a semiconductor device is provided to reduce impurities remaining on a lower electrode or in a high dielectric layer, by performing an ozone or plasma annealing process as a pre-treatment process after the lower electrode is formed or by performing an ozone or plasma annealing process as a post-treatment process after the high dielectric layer is formed. CONSTITUTION: The lower electrode is formed on a semiconductor substrate(1). A pre-treatment process is performed regarding the lower electrode. A dielectric layer is formed on the lower electrode. The dielectric layer is annealed in an atmosphere of an oxygen radical or plasma, and a post-treatment process is performed. An upper electrode is formed on the post-treated dielectric layer. The pre-treatment process, the process for forming the dielectric layer and the post-treatment process are performed in the same chamber.

Abstract translation: 目的：提供一种用于制造半导体器件的电容器的方法，以通过在形成下电极之后进行臭氧或等离子体退火处理作为预处理工艺来减少残留在下电极或高介电层中的杂质，或 通过在形成高介电层之后进行臭氧或等离子体退火处理作为后处理工艺。 构成：下电极形成在半导体衬底（1）上。 对下电极进行预处理。 电介质层形成在下电极上。 电介质层在氧自由基或等离子体的气氛中进行退火，进行后处理工序。 在后处理电介质层上形成上电极。 在相同的室中进行预处理工艺，形成介电层的工艺和后处理工艺。

公开(公告)号：KR1020020030412A

公开(公告)日：2002-04-25

申请号：KR1020000061028

申请日：2000-10-17

Applicant: 삼성전자주식회사

Inventor： 황두섭 ,  정은애 ,  김완돈 ,  유차영

IPC: H01L27/108

Abstract: PURPOSE: A method for fabricating a capacitor of a semiconductor device using an agglomeration preventing layer is provided to prevent a thin film from being disconnected, by preventing a lower electrode material from being agglomerated in performing a heat treatment process regarding a lower electrode. CONSTITUTION: The lower electrode(210) is formed on a semiconductor substrate(200). The agglomeration preventing layer(220) for preventing agglomeration of the lower electrode is formed on the lower electrode. A heat treatment process is performed regarding the lower electrode. The agglomeration preventing layer is eliminated. A dielectric layer is deposited on the lower electrode. A heat treatment process is performed regarding the dielectric layer and is crystallized. An upper electrode is formed on the dielectric layer.

Abstract translation: 目的：提供一种使用防凝结层制造半导体器件的电容器的方法，通过防止在对下电极进行热处理过程中使下电极材料凝聚而防止薄膜断开。 构成：下电极（210）形成在半导体衬底（200）上。 在下部电极上形成防止下部电极附聚的凝聚防止层（220）。 对下部电极进行热处理。 消除了防结块层。 电介质层沉积在下电极上。 对电介质层进行热处理，并结晶化。 在电介质层上形成上电极。

公开(公告)号：KR1020010105155A

公开(公告)日：2001-11-28

申请号：KR1020010013751

申请日：2001-03-16

Applicant: 삼성전자주식회사

Inventor： 유차영 ,  임한진 ,  주재현 ,  김완돈 ,  이세진 ,  이윤정 ,  박순연 ,  정용국 ,  최한메 ,  홍경훈 ,  원석준

IPC: H01L21/31

Abstract: 본 발명은 스텝 커버리지와 스루풋을 향상시킬 수 있는, 2단계 증착공정에 의한 금속산화막을 형성하는 방법 및 이를 이용한 반도체 캐패시터의 제조방법에 관한 것이다.
본 발명의 금속산화막을 형성하는 방법은 하부막상에 1차 금속 산화막을 저온 혹은 저압 공정을 수행하여 증착하는 단계와; 상기 1차 금속 산화막상에 상기 1차 탄탈륨 산화막의 증착조건에 비해 상대적으로 고온 혹은 고압 공정을 수행하여 2차 탄탈륨 산화막을 증착하는 단계를 포함한다.
상기 하부막은 폴리실리콘막이고 상기 금속막은 탄탈륨 산화막인 경우, 상기 1차 탄탈륨 산화막의 저온증착 공정은 420~460℃에서 수행되고 저압증착공정은 0.3-3 Torr 의 압력에서 수행되며, 상기 2차 탄탈륨 산화막의 고온증착 공정은 460~500℃에서 수행되고 고압증착공정은 3-5 Torr 의 압력에서 수행된다.
상기 하부막은 금속막이고 상기 금속 산화막은 탄탈륨 산화막인 경우, 상기 1차 탄탈륨 산화막의 저온증착 공정은 350~450℃에서 수행되고 저압증착공정은 0.01-2 Torr 의 압력에서 수행되며, 상기 2차 탄탈륨 산화막의 고온증착 공정은 400~500℃에서 수행되고 고압증착공정은 0.1-10 Torr 의 압력에서 수행된다.

公开(公告)号：KR1020010066747A

公开(公告)日：2001-07-11

申请号：KR1020000012056

申请日：2000-03-10

Applicant: 삼성전자주식회사

Inventor： 원석준 ,  유차영

IPC: H01L21/205

CPC classification number: C23C16/0281 ,  C23C16/18 ,  C23C16/45523 ,  C23C16/45557 ,  H01L28/55 ,  H01L28/60 ,  H01L28/65

Abstract: PURPOSE: A method for manufacturing a ruthenium layer by a chemical vapor deposition(CVD) method while varying a process condition is provided to improve step coverage and surface morphology, by initially depositing a ruthenium layer of which a nuclear formation rate is faster than a growth rate, and by afterwards depositing a ruthenium layer of which the growth rate is faster than the nuclear formation rate. CONSTITUTION: While the pressure inside a deposition chamber is maintained at the first pressure and the flow rate of oxygen gas is maintained at the first flow rate, a ruthenium layer is deposited. While the pressure inside the deposition chamber is maintained at the second pressure and the flow rate of oxygen gas is maintained at the second flow rate, a ruthenium layer is deposited. The first pressure is higher than the second pressure, and the first flow rate is greater than the second flow rate.

Abstract translation: 目的：提供一种通过化学气相沉积（CVD）方法制备钌层的方法，同时改变工艺条件以通过最初沉积核生成速率比生长快的钌层来改善台阶覆盖率和表面形态 速率，然后沉积生长速度快于核形成速率的钌层。 构成：当沉积室内的压力保持在第一压力并且氧气的流量保持在第一流速时，沉积钌层。 当沉积室内的压力保持在第二压力并且氧气的流量保持在第二流量时，沉积钌层。 第一压力高于第二压力，第一流量大于第二流量。

公开(公告)号：KR1020010038145A

公开(公告)日：2001-05-15

申请号：KR1019990046016

申请日：1999-10-22

Applicant: 삼성전자주식회사

Inventor： 원석준 ,  유차영

IPC: H01L27/10

Abstract: PURPOSE: A method for forming a lower electrode of a concave type capacitor is to optionally form a lower electrode only inside a concave using a bottom layer and a spacer within the concave so that a series of processes for forming the lower electrode is removed and a total process is simplified. CONSTITUTION: An interlayer dielectric(24) is formed on a semiconductor substrate(22). On the interlayer dielectric is formed the first faster growth layer(FGL)(26) acting as a bottom layer of a concave. Each of the interlayer dielectric and the first FGL are patterned to expose the surface of the substrate so that a contact hole is formed. In the contact hole is formed a plug(28) for connecting between the substrate and the lower electrode. On the resultant structure formed a mold layer(30) for forming the lower electrode pattern. The mold layer is patterned to form a concave for the lower electrode pattern. On the side of the concave is provided a spacer(32) consisting of the second faster growth layer. On the resultant structure is deposited a conductive layer(34) for the lower electrode and thereby the lower electrode is formed inside the concave.

Abstract translation: 目的：一种用于形成凹型电容器的下电极的方法是，仅使用凹陷内的底层和间隔件在凹形内部形成下电极，从而除去一系列用于形成下电极的工艺， 总体流程简化。 构成：在半导体衬底（22）上形成层间电介质（24）。 在层间电介质上形成第一较快生长层（FGL）（26），其作为凹陷的底层。 图案化层间电介质和第一FGL中的每一个以露出基板的表面，从而形成接触孔。 在接触孔中形成用于连接衬底和下电极的插头（28）。 在所得到的结构上形成用于形成下电极图案的模具层（30）。 图案化模具层以形成用于下部电极图案的凹部。 在凹面的一侧设置有由第二较快生长层组成的间隔物（32）。 在所得结构上淀积用于下电极的导电层（34），从而在凹形内部形成下电极。

公开(公告)号：KR1020010036043A

公开(公告)日：2001-05-07

申请号：KR1019990042879

申请日：1999-10-05

Applicant: 삼성전자주식회사

Inventor： 황두섭 ,  박홍배 ,  강창석 ,  유차영

IPC: H01L21/316

Abstract: PURPOSE: A method for manufacturing a high dielectric layer of a semiconductor device is provided to control growth of a protrusion in the high dielectric layer and to form a uniform surface of the high dielectric layer, by alternatively supplying different oxidation gas. CONSTITUTION: The first gas composed of source gas and oxygen atoms only which are need to form a high dielectric layer(40) is supplied to a substrate(10) to form the first thin film(22) on the substrate. The second gas composed of at least one of a group composed of N2O, O2, O3, NOx, N2 and Ar includes at least one atom except an oxygen atom, and is supplied to the surface of the first thin film together with the source gas to evaporate the second thin film(24). The processes for evaporating the first and second thin films are repeated at least twice.

Abstract translation: 目的：提供一种用于制造半导体器件的高介电层的方法，以通过交替地供应不同的氧化气体来控制高电介质层中的突起的生长并形成高介电层的均匀表面。 构成：仅由需要形成高介电层（40）的源气体和氧原子构成的第一气体被供给到基板（10），以在基板上形成第一薄膜（22）。 由N 2 O，O 2，O 3，NO x，N 2和Ar组成的组中的至少一个构成的第二气体包括除了氧原子以外的至少一个原子，并与源气体一起供给到第一薄膜的表面 以蒸发第二薄膜（24）。 蒸发第一和第二薄膜的方法重复至少两次。

公开(公告)号：KR1020010027867A

公开(公告)日：2001-04-06

申请号：KR1019990039839

申请日：1999-09-16

Applicant: 삼성전자주식회사

Inventor： 강창석 ,  황두섭 ,  유차영 ,  박영욱 ,  박홍배

IPC: H01L27/108

CPC classification number: H01L28/60 ,  H01L21/321 ,  H01L28/55

Abstract: PURPOSE: A method for manufacturing a capacitor of a semiconductor device is provided to decrease a leakage current by reducing impurities remaining in a storage electrode or high dielectric layer. CONSTITUTION: A dielectric layer is formed on a storage electrode. The dielectric layer is annealed in an atmosphere of oxygen radical or plasma, and is after-treated. A plate electrode is formed on the after-treated dielectric layer. The deposition of the dielectric layer and the after-treatment are peformed in the same chamber. The oxygen radical atmosphere is an acid atmosphere containing ozone.

Abstract translation: 目的：提供一种用于制造半导体器件的电容器的方法，通过减少存储电极或高介电层中残留的杂质来减少泄漏电流。 构成：在存储电极上形成介电层。 电介质层在氧自由基或等离子体气氛中进行退火，进行后处理。 在后处理电介质层上形成平板电极。 电介质层的沉积和后处理在同一个室内进行。 氧自由基气氛是含有臭氧的酸性气氛。

公开(公告)号：KR100269291B1

公开(公告)日：2000-10-16

申请号：KR1019970005566

申请日：1997-02-24

Applicant: 삼성전자주식회사

Inventor： 박홍배 ,  유차영 ,  신명환 ,  배재현

IPC: H01L21/302

Abstract: PURPOSE: A method for cleaning a wafer is provided, which can remove a film formation solution coated on a front surface and a back surface edge part of the wafer while forming a ferroelectric using a Sol-Gel method. CONSTITUTION: According to the method, a PZT(PbZrTiO3) solution coated on a front surface edge part of the wafer(11) is removed with a DI(Deionized) water, and a PZT solution coated on a back surface edge part is removed with an IPA(IsoProphyl Alcohol). Thus, particles can be prevented which are generated during a high temperature annealing process and following processes. The method includes a step of coating a solution containing a component of a film to be formed as a dielectric film on the wafer(11), and a step of rinsing the wafer(11) coated with the solution containing a ferroelectric.

Abstract translation: 目的：提供一种用于清洁晶片的方法，其可以使用Sol-Gel方法除去涂覆在晶片的前表面和后表面边缘部分上的成膜溶液，同时形成铁电体。 构成：根据该方法，用DI（去离子水）除去涂布在晶片（11）的前表面边缘部分上的PZT（PbZrTiO 3）溶液，并且将涂覆在背面边缘部分上的PZT溶液用 IPA（异丙醇）。 因此，可以防止在高温退火工艺和后续工艺中产生的颗粒。 该方法包括在晶片（11）上涂布含有要作为电介质膜形成的膜的成分的溶液的步骤，以及对含有铁电体的溶液进行了涂覆的晶片（11）的步骤。