公开(公告)号：KR1020130077213A

公开(公告)日：2013-07-09

申请号：KR1020110145800

申请日：2011-12-29

Applicant: 삼성전자주식회사

Inventor： 유종렬 ,  정성훈 ,  김봉현 ,  김효정 ,  신동운 ,  홍수진

IPC: H01L21/8238 ,  H01L21/336 ,  H01L29/78

CPC classification number: H01L21/02381 ,  H01L21/26513 ,  H01L21/823842 ,  H01L29/41725 ,  H01L29/42316 ,  H01L29/66712 ,  H01L29/7802

Abstract: PURPOSE: A method for manufacturing a semiconductor device is provided to reduce the surface resistance of an NMOS electrode by preventing the loss of an n-type impurity. CONSTITUTION: A first mask (106) covering a polysilicon layer corresponding to a second region is formed. An N-region (110) is formed by injecting an n-type impurity to a polysilicon layer corresponding to a first region. Nitrogen is injected into the N-region. A second mask covering the N-region is formed. A P-region is formed by injecting a p-type impurity to the polysilicon layer corresponding to the second region. [Reference numerals] (AA) Nitrogen; (BB) First region; (CC) Second region

Abstract translation: 目的：提供一种用于制造半导体器件的方法，以通过防止n型杂质的损失来降低NMOS电极的表面电阻。 构成：形成覆盖对应于第二区域的多晶硅层的第一掩模（106）。 通过向对应于第一区域的多晶硅层注入n型杂质形成N区（110）。 氮注入N区。 形成覆盖N区的第二掩模。 通过向对应于第二区域的多晶硅层注入p型杂质形成P区。 （标号）（AA）氮气; （BB）第一区; （CC）第二地区

公开(公告)号：KR1020100089229A

公开(公告)日：2010-08-12

申请号：KR1020090008386

申请日：2009-02-03

Applicant: 삼성전자주식회사

Inventor： 정성훈

IPC: G11C16/08 ,  G11C16/06

CPC classification number: G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7202 ,  G11C16/08 ,  G11C16/06

Abstract: PURPOSE: A data management method through logical address mapping method and a flash memory device thereof are provided to improve utilization of a storage space of a logic blocks during processes of data recording and data reading by saving different data on a cash block. CONSTITUTION: A flash memory device(100) comprises a memory unit(110), a data I/O part(120), and a flash memory management unit(130). The memory unit comprises one or more flash memory. The flash memory is composed of the NAND flash memory. The data I/O part transfers data forth and back between the host and the flash memory.

Abstract translation: 目的：提供一种通过逻辑地址映射方法的数据管理方法及其闪速存储装置，用于通过将现金块上的不同数据保存在数据记录和数据读取过程中来提高对逻辑块的存储空间的利用。 构成：闪存器件（100）包括存储器单元（110），数据I / O部件（120）和闪存管理单元（130）。 存储器单元包括一个或多个闪存。 闪存由NAND闪存组成。 数据I / O部分在主机和闪速存储器之间传送数据。

公开(公告)号：KR1020100080702A

公开(公告)日：2010-07-12

申请号：KR1020090000113

申请日：2009-01-02

Applicant: 삼성전자주식회사

Inventor： 강종훈 ,  박태서 ,  김동찬 ,  김영석 ,  류정도 ,  유종렬 ,  정성훈 ,  최시영 ,  신유균

IPC: H01L21/336 ,  H01L29/78

CPC classification number: H01L29/66348 ,  H01L21/02068 ,  H01L21/2253 ,  H01L29/4232

Abstract: PURPOSE: A methods of fabricating a semiconductor device is provided to reduce the load of counter doping by performing a local doping through a conformal doping. CONSTITUTION: A semiconductor substrate including a cell region(A) and a core / a peri area(B) is prepared. A gate insulating layer(121) is formed on semiconductor substrate. The first undoped polysilicon layer(122) is formed on the gate insulating layer. The first doped polysilicon layer(123) is formed on the first undoped polysilicon film. The first doped polysilicon film is removed so that the first undoped polysilicon film is exposed to the outside. The dopant of the first conductivity type is inserted in a part and cell region of the core / peri area.

Abstract translation: 目的：提供制造半导体器件的方法，以通过通过共形掺杂进行局部掺杂来减小反向掺杂的负载。 构成：制备包括单元区域（A）和核心/周边区域（B）的半导体基板。 在半导体衬底上形成栅极绝缘层（121）。 第一未掺杂多晶硅层（122）形成在栅极绝缘层上。 第一掺杂多晶硅层（123）形成在第一未掺杂多晶硅膜上。 去除第一掺杂多晶硅膜，使得第一未掺杂多晶硅膜暴露于外部。 第一导电类型的掺杂剂插入芯/周边区域的一部分和单元区域中。

公开(公告)号：KR1020100013898A

公开(公告)日：2010-02-10

申请号：KR1020080075638

申请日：2008-08-01

Applicant: 삼성전자주식회사

Inventor： 유종렬 ,  박태서 ,  강종훈 ,  김동찬 ,  류정도 ,  정성훈 ,  최시영 ,  신유균

IPC: H01L21/22 ,  H01L21/336

CPC classification number: H01L21/823842 ,  H01L21/823828 ,  H01L27/10873 ,  H01L27/10894

Abstract: PURPOSE: A plasma doped semiconductor devices having a dopant loss preventive layer and a method for manufacturing the same are provided to improve electrical properties by forming a gate electrode with a impurity loss prevention film after doping a source gas including a silicon component. CONSTITUTION: A gate dielectric layer(110) is formed on a semiconductor substrate(100). An N type gate electrode wiring(135) is formed on the gate dielectric layer. An NMOS area is covered by a photoresist solution mask and PMOS area is opened. The p type impurity is doped on the PMOS area through a plasma doping process. P type impurity plasma doping and plasma doping through a silicon source gas are performed at the same time and P-type impurity loss prevention film(140) is formed. Mask is eliminated and the gate electrode(115) is formed after cleaning.

Abstract translation: 目的：提供具有掺杂剂损失防止层的等离子体掺杂半导体器件及其制造方法，以在掺杂包括硅成分的源气体之后，通过形成具有杂质损失防止膜的栅电极来改善电性能。 构成：在半导体衬底（100）上形成栅介质层（110）。 在栅极电介质层上形成N型栅电极配线（135）。 NMOS区域被光致抗蚀剂溶液掩模覆盖，并且PMOS区域被打开。 p型杂质通过等离子体掺杂工艺掺杂在PMOS区域上。 通过硅源气体进行P型杂质等离子体掺杂和等离子体掺杂，同时形成P型杂质损失膜（140）。 消除掩模，并且在清洁之后形成栅电极（115）。

公开(公告)号：KR3005302810000S

公开(公告)日：2009-06-09

申请号：KR3020080052107

申请日：2008-12-03

Applicant: 삼성전자주식회사

Designer： 천동원 ,  김정민 ,  이주열 ,  이영석 ,  정성훈 ,  박영현

公开(公告)号：KR1020090039409A

公开(公告)日：2009-04-22

申请号：KR1020070105037

申请日：2007-10-18

Applicant: 삼성전자주식회사

Inventor： 박홍석 ,  최진석 ,  정성훈

IPC: G06Q50/10 ,  G06F17/30 ,  H04N21/4722 ,  G06F15/02

CPC classification number: G06F17/30873 ,  G06Q50/10 ,  G06F15/0291 ,  H04N21/4722

Abstract: A method and an apparatus for providing customized contents are provided to automatically search contents by mark log information and supply contents suitable for a person. Selected contents are displayed(210~240). Log information according to marking is generated on the displayed contents(250). Contents related to the mark log information are searched in a network and linked with the mark log information(252~264). The mark log information is recorded information displayed by a user. The mark log information is additionally defined by the user or a manufacturer. The marking log information is classified into various link information defined by the user or the manufacturer. If it is checked offline when the mark log information is generated, the marking log information is stored in an additional repository(272).

Abstract translation: 提供一种用于提供定制内容的方法和装置，用于通过标记日志信息自动搜索内容并提供适合于人的内容。 显示所选内容（210〜240）。 在显示的内容（250）上生成根据标记的记录信息。 与标记日志信息相关的内容在网络中搜索并与标记日志信息（252〜264）链接。 标记日志信息是由用户显示的记录信息。 标记日志信息由用户或制造商另外定义。 标记日志信息被分类为由用户或制造商定义的各种链接信息。 如果在生成标记日志信息时脱机检查，则标记日志信息存储在附加存储库中（272）。

公开(公告)号：KR1020080105390A

公开(公告)日：2008-12-04

申请号：KR1020070052920

申请日：2007-05-30

Applicant: 삼성전자주식회사

Inventor： 이동우 ,  민형석 ,  강신욱 ,  박향숙 ,  정성훈 ,  신상섭 ,  정혜림

IPC: G06F9/22 ,  G06F9/06

CPC classification number: G06F13/28 ,  G06F3/0601 ,  G06F2003/0692

Abstract: A method and an apparatus for controlling commands used in a flash memory are provided to process commands for recording and writing on the flash memory through a DMA controller part, thereby improving the performance of a system. A method for controlling flash memory commands comprises the following steps of: receiving information about one or more commands stored at present in a system memory(210); receiving a command which the information received from the system memory shows(220); and generating an interrupt signal which informs that all of the commands are received(250).

Abstract translation: 提供了一种用于控制闪速存储器中使用的命令的方法和装置，用于通过DMA控制器部件处理用于在闪速存储器上记录和写入的命令，从而提高系统的性能。 一种用于控制闪速存储器命令的方法包括以下步骤：接收关于当前存储在系统存储器（210）中的一个或多个命令的信息; 接收从系统存储器接收到的信息的命令（220）; 并产生通知所有命令被接收的中断信号（250）。

公开(公告)号：KR1020080056584A

公开(公告)日：2008-06-23

申请号：KR1020060129661

申请日：2006-12-18

Applicant: 삼성전자주식회사

Inventor： 정성훈 ,  배성환 ,  김장환 ,  윤남현 ,  김영봉 ,  민형석 ,  이동우 ,  강신욱 ,  박향숙

IPC: G06F12/00 ,  G06F9/00

CPC classification number: G06F12/0246 ,  G06F2212/7205

Abstract: A method and a device for scheduling commands of a virtual file system installed in a non-volatile data storage device are provided to reduce complexity and perform interleaving efficiently in the virtual file system by setting a schedule preparation phase in the virtual file system. An execution time calculator(1110) calculates an execution time for preparing a data I/O(Input/Output) command by each unit managed by a virtual file system. A first controller(1120) performs a plurality of metadata commands for managing data by setting a preparation phase according to the longest execution time among the calculated execution time. A second controller(1130) performs the data I/O commands at once after the set preparation phase. The first controller includes an idle time calculator(1121) calculating an idle time by subtracting the calculated preparation execution time of each management unit from the set preparation phase execution time and an additional processor(1122) performing the metadata command of the next preparation phase in the calculated idle time by each management unit.

Abstract translation: 提供了一种用于调度安装在非易失性数据存储设备中的虚拟文件系统的命令的方法和装置，以通过在虚拟文件系统中设置调度准备阶段来降低复杂度并且在虚拟文件系统中有效地执行交织。 执行时间计算器（1110）由虚拟文件系统管理的每个单元计算用于准备数据I / O（输入/输出）命令的执行时间。 第一控制器（1120）通过根据计算出的执行时间中的最长执行时间设置准备阶段来执行用于管理数据的多个元数据命令。 第二控制器（1130）在设置准备阶段之后立即执行数据I / O命令。 第一控制器包括空闲时间计算器（1121），从设定准备阶段执行时间减去每个管理单元的计算准备执行时间，以及执行下一个准备阶段的元数据命令的附加处理器（1122），计算空闲时间 每个管理单位计算的空闲时间。

公开(公告)号：KR100754226B1

公开(公告)日：2007-09-03

申请号：KR1020060079527

申请日：2006-08-22

Applicant: 삼성전자주식회사

Inventor： 정성훈 ,  민형석 ,  이동우 ,  강신욱 ,  박향숙

IPC: G11C16/06 ,  G11C16/10

CPC classification number: G11C16/102 ,  G11C2216/14 ,  G11C7/1096 ,  G11C16/14

Abstract: A method for programming a non-volatile data storage device and an apparatus thereof are provided to perform a write operation at high speed by using a plurality of page buffers comprised in the non-volatile data storage device. An apparatus for programming a non-volatile data storage device comprising a plurality of page buffers(440,450) includes a control command part(420) transferring a command to program data in a memory cell array(430) comprised in the non-volatile data storage device through one of the page buffers, and an input/output control part(410) controlling a setup operation of loading data through another page buffer instead of the selected page buffer while the programming is performed.

Abstract translation: 提供了一种非易失性数据存储装置及其装置的编程方法，通过使用包含在非易失性数据存储装置中的多个页缓冲器来高速执行写操作。 一种用于对包括多个页面缓冲器（440,450）的非易失性数据存储设备进行编程的装置包括：控制命令部分（420），将命令传送到包含在非易失性数据存储器中的存储单元阵列（430）中的程序数据 设备通过页缓冲器之一，以及输入/输出控制部分（410），其控制在执行编程时通过另一页缓冲器而不是所选页缓冲器加载数据的设置操作。

公开(公告)号：KR100614240B1

公开(公告)日：2006-08-18

申请号：KR1020040042613

申请日：2004-06-10

Applicant: 삼성전자주식회사

Inventor： 황성욱 ,  강창진 ,  지경구 ,  정성훈

IPC: H01L21/336

CPC classification number: H01L29/4236 ,  H01L29/495 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66553 ,  H01L29/66621

Abstract: 트랜지스터를 포함하는 반도체 소자 및 그 형성 방법을 제공한다. 이 소자는 그것의 아랫부분이 기판의 소정영역에 형성된 채널 트랜치를 채우고, 그것의 윗부분이 기판 위로 돌출된 금속 게이트 전극, 채널 트랜치의 내측벽 및 바닥면과, 금속 게이트 전극 사이에 개재된 게이트 절연막, 및 금속 게이트 전극 양측의 기판에 형성된 소오스/드레인 영역을 구비한다.