Transformer comprises a first coil and a second coil formed in displaced surfaces of a semiconductor device

    公开(公告)号:DE10100282A1

    公开(公告)日:2002-07-18

    申请号:DE10100282

    申请日:2001-01-04

    Abstract: Transformer comprises a first coil (20) and a second coil (40) formed in displaced surfaces of a semiconductor device. An Independent claim is also included for a process for the production of a transformer comprising preparing a first semiconductor body (10) and forming the first coil on the surface of this body or in the body; preparing a second semiconductor body (30) and forming the second coil on the surface of this body or in the body; and applying the second semiconductor body on the first semiconductor body. Preferred Features: The coils are formed as spiral-like conducting pathways. The first coil is covered with a first insulating layer (14) in the region of the first semiconductor body and the second coil is covered with a second insulating layer (36) in the region of the second semiconductor body. The first coil is further covered with a third insulating layer (70).

    69.
    发明专利
    未知

    公开(公告)号:DE10026925A1

    公开(公告)日:2001-12-20

    申请号:DE10026925

    申请日:2000-05-30

    Inventor: WERNER WOLFGANG

    Abstract: The field effect semiconductor has a semiconductor body (1) provided with at least one inner zone (2) of one conductivity type, incorporating at least one base zone (4) of opposite conductivity type at the surface (3) of the semiconductor body, in turn incorporating a source zone (5) with the same conductivity as the inner zone. A further base zone (15) is separated from the first base zone by an intermediate zone (16) with the same conductivity as the inner zone. A source contact zone (17) provides a low-ohmic connection between the source zone, the base zone and the further base zone.

    Two-way blocking semiconductor switch with control and two load terminals

    公开(公告)号:DE10026742A1

    公开(公告)日:2001-12-13

    申请号:DE10026742

    申请日:2000-05-30

    Inventor: WERNER WOLFGANG

    Abstract: A FET (T1) has a gate terminal (G) coupled to control terminal (K1), and a source terminal (S) coupled to first load terminal (K2). To the second load terminal (K3) is linked the drain terminal (D), while there is also a substrate terminal (sub). A bipolar transistor (T2) comprises a base terminal (B), an emitter terminal (E), and a collector terminal (K) with the emitter terminal coupled to the FET substrate terminal. The base and collector terminals are also linked to the first load terminal.

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