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公开(公告)号:WO2014097835A1
公开(公告)日:2014-06-26
申请号:PCT/JP2013/081846
申请日:2013-11-27
Applicant: 株式会社村田製作所
Inventor: 千阪 俊介
CPC classification number: H05K3/284 , H05K3/4632 , H05K2201/0162 , H05K2201/09872 , H05K2203/1316
Abstract: 樹脂多層基板(101)は、積層された複数の熱可塑性樹脂層としての樹脂層(2)を含み、複数の熱可塑性樹脂層が積層された部分の一方の主面(1u)の側にシリカが露出するシリカ露出面(20)を有する多層基板本体(1)と、多層基板本体(1)の一方の主面(1u)の側に実装された部品(3)と、シリコーン樹脂を主材料とし、一方の主面(1u)の側においてシリカ露出面(20)と少なくとも一部が接するようにして部品(3)を封止する封止樹脂層(23)とを備える。
Abstract translation: 树脂多层基板(101)具有多层基板主体(1),该多层基板主体(1)具有层叠热塑性树脂层的多个树脂层(2),并具有二氧化硅露出面(20),其中,二氧化硅 在层叠多个热塑性树脂层的单元的一个主表面(1u)上露出; 安装在多层基板主体(1)的主面(1u)上的部件(3); 以及主要由有机硅树脂形成的封装树脂层(23),并且封装所述部件(3),使得所述封装树脂层(23)的至少一部分与所述二氧化硅暴露面(20)接触, 主表面(1u)。
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公开(公告)号:WO2013132250A1
公开(公告)日:2013-09-12
申请号:PCT/GB2013/050550
申请日:2013-03-06
Applicant: SEMBLANT LIMITED
Inventor: BROOKS, Andrew , VON WERNE, Timothy
CPC classification number: H05K3/284 , B05D1/62 , B05D7/54 , B05D7/58 , B05D2506/10 , C08G2261/3424 , C09D127/20 , C09D165/04 , H05K2201/015 , H05K2201/09872 , H05K2203/095
Abstract: The present invention relates to an electrical assembly which has a conformal coating, wherein said conformal coating is obtainable by a method which comprises plasma polymerization of a compound of formula (I) and deposition of the resulting polymer and plasma polymerization of a fluorohydrocarbon and deposition of the resulting polymer: (I) wherein: R 1 represents C 1 -C 3 alkyl or C 2 -C 3 alkenyl; R 2 represents hydrogen, C 1 -C 3 alkyl or C 2 -C 3 alkenyl; R 3 represents hydrogen, C 1 -C 3 alkyl or C 2 -C 3 alkenyl; R 4 represents hydrogen, C 1 -C 3 alkyl or C 2 -C 3 alkenyl; R 5 represents hydrogen, C 1 -C 3 alkyl or C 2 -C 3 alkenyl;; and R 6 represents hydrogen, C 1 -C 3 alkyl or C 2 -C 3 alkenyl.
Abstract translation: 本发明涉及具有保形涂层的电气组件,其中所述保形涂层可通过包括式(I)化合物的等离子体聚合和所得聚合物的沉积和氟代烃的等离子体聚合的方法获得, 所得聚合物:(I)其中:R 1表示C 1 -C 3烷基或C 2 -C 3烯基; R 2表示氢,C 1 -C 3烷基或C 2 -C 3烯基; R3表示氢,C1-C3烷基或C2-C3烯基; R4表示氢,C1-C3烷基或C2-C3烯基; R5表示氢,C1-C3烷基或C2-C3烯基; 并且R 6表示氢,C 1 -C 3烷基或C 2 -C 3烯基。
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公开(公告)号:WO2010069786A1
公开(公告)日:2010-06-24
申请号:PCT/EP2009/066441
申请日:2009-12-04
Applicant: STMICROELECTRONICS (GRENOBLE) SAS , COFFY, Romain , SAUTY, Jean-François
Inventor: COFFY, Romain , SAUTY, Jean-François
IPC: H05K9/00 , H01L23/552 , H05K1/02
CPC classification number: H05K9/0022 , H01L23/3128 , H01L23/3135 , H01L23/552 , H01L24/97 , H01L25/16 , H01L2224/16225 , H01L2224/73204 , H01L2224/97 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01058 , H01L2924/01074 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/19105 , H01L2924/3025 , H05K1/0218 , H05K3/284 , H05K3/388 , H05K2201/0179 , H05K2201/09872 , Y10T29/49124 , H01L2224/81 , H01L2924/00
Abstract: A surface-mounted shielded multicomponent assembly, comprising a wafer (1) on which several electronic components (2, 3, 4) are assembled; an insulating layer (30) conformally deposited on the structure with a thickness smaller than the height of the electronic components, comprising at least one opening (31) emerging on a contact (32) of said wafer; a conductive shielding layer (35) covering the insulating layer and said at least one opening; and a resin layer (6) covering the conductive layer.
Abstract translation: 一种表面安装的屏蔽多组件组件,包括其上组装有几个电子部件(2,3,4)的晶片(1) 在所述结构上共形沉积的厚度小于所述电子部件的高度的绝缘层(30),包括在所述晶片的触点(32)上露出的至少一个开口(31) 覆盖绝缘层和所述至少一个开口的导电屏蔽层(35); 和覆盖导电层的树脂层(6)。
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64.
公开(公告)号:WO2008027888A2
公开(公告)日:2008-03-06
申请号:PCT/US2007/076991
申请日:2007-08-28
Applicant: TEXAS INSTRUMENTS INCORPORATED , SALZMAN, James, F.
Inventor: SALZMAN, James, F.
IPC: H05K9/00
CPC classification number: H05K9/0084 , H05K1/0218 , H05K3/284 , H05K2201/09872 , H05K2203/0191 , H05K2203/0582
Abstract: An electrical device (100) comprising an electronic component (105) mounted to a surface (110) of a printed circuit board (115), a ground connection (120) on said surface, and electromagnetic interference (EMI) shielding (125). The EMI shielding includes an electrical insulator (130) coating the electronic component, the insulator contacting the surface, and a conductive layer (135) covering the electrical insulator, and contacting the electrical insulator and the ground connection.
Abstract translation: 一种电气设备(100),包括安装到印刷电路板(115)的表面(110)上的电子部件(105),所述表面上的接地连接(120)和电磁干扰(EMI)屏蔽(125)。 EMI屏蔽包括涂覆电子部件的电绝缘体(130),与表面接触的绝缘体以及覆盖电绝缘体的导电层(135),并接触电绝缘体和接地连接。
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65.
公开(公告)号:KR1020150057886A
公开(公告)日:2015-05-28
申请号:KR1020130141785
申请日:2013-11-20
Applicant: 삼성에스디아이 주식회사
CPC classification number: C09D5/00 , C08J3/243 , C08K5/0025 , C08K2003/222 , C08K2003/2227 , C08K2003/2231 , C08K2003/2296 , C08K2003/282 , C08K2003/385 , C08L83/04 , H01L23/296 , H05K1/0259 , H05K1/18 , H05K3/0011 , H05K3/284 , H05K3/285 , H05K2201/0162 , H05K2201/09872 , H05K2201/10015 , H05K2201/10022 , H05K2201/10166 , H05K2201/10181
Abstract: 본발명의일 실시예는전자소자보호용통합실리콘, 이를이용한회로모듈및 이의제조방법에관한것으로, 해결하고자하는기술적과제는컨포멀, 열전도및 정전기보호기능을가질뿐만아니라경화시간이 60초이내인전자소자보호용통합실리콘, 이를이용한회로모듈및 이의제조방법을제공하는데있다. 이를위해본 발명은모노머및 올리고머로이루어진군으로부터적어도하나가선택된베이스수지; 열개시제; 및광 개시제로이루어진전자소자보호용통합실리콘을개시한다. 또한, 본발명은절연층위에다수의회로패턴이형성된인쇄회로기판; 및, 회로패턴에솔더에의해전기적으로접속된다수의전자소자를포함하고, 회로패턴, 솔더및 전자소자중 적어도하나에코팅되어경화된상술한통합실리콘로이루어진회로모듈을개시한다. 또한, 본발명은절연층위에다수의회로패턴이형성된인쇄회로기판을구비하고, 회로패턴에다수의전자소자를솔더로전기적으로연결하는단계; 회로패턴, 솔더및 전자소자중 적어도하나에에 상술한통합실리콘을코팅하는단계; 및통합실리콘을광 및열을이용해경화하는단계로이루어진회로모듈의제조방법을개시한다.
Abstract translation: 本发明的实施例涉及一种用于保护电子设备的集成硅胶,使用其的电路模块及其制造方法。 要解决的技术问题是提供一种用于保护电子装置的集成硅胶,其具有保护保形,导热性和静电的功能,并在60秒内提供硬化时间,使用其的电路模块和 其制造方法。 为此,公开了用于保护电子器件的集成硅氧烷,其包括:基础树脂,其为选自单体和低聚物中的至少一种元素; 热引发剂; 和光引发剂。 此外,公开了电路模块,包括:印刷电路板,其具有形成在绝缘层上的多个电路图案; 以及集成硅树脂,其包括通过焊料电连接到电路图案的多个电子器件,并且在至少一个电路图案,焊料和电子器件上被涂覆和硬化。 此外,公开了电路模块的制造方法,包括以下步骤:包括印刷电路板,其具有形成在绝缘层上并将多个电子器件电连接到电路图案的多个电路图案; 在至少一个电路图案,焊料和电子设备中涂覆集成硅树脂; 并使用光和热硬化整合的硅胶。
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公开(公告)号:KR1020130000373A
公开(公告)日:2013-01-02
申请号:KR1020127018995
申请日:2011-01-21
Applicant: 유로플라즈마 엔브이
CPC classification number: H05K3/284 , B05D1/62 , B05D3/0493 , B05D3/142 , B05D5/083 , B05D2506/10 , H01J37/32541 , H01L23/293 , H01L2924/0002 , H01L2924/09701 , H01L2924/12044 , H05K3/282 , H05K2201/015 , H05K2201/09872 , H05K2203/095 , Y10T428/239 , H01L2924/00
Abstract: 본발명은 저압 플라즈마 공정에 의해 도포되는 나노코팅에 관한 것이다. 본발명은 또한 3차원 나노구조체, 특히 전기적으로 전도성 및 비-전도성 요소를 함유하는 3차원 구조체 상에 그러한 공형 나노코팅을 제조하기 위한 방법에 관한 것이다.
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公开(公告)号:KR100151861B1
公开(公告)日:1998-10-15
申请号:KR1019910005985
申请日:1991-04-15
Applicant: 노드슨 코포레이션
IPC: B05B13/00
CPC classification number: H05K3/0091 , B05B13/0431 , H05K2201/09872 , H05K2203/1366 , H05K2203/1509
Abstract: 분무 노즐을 갖는 분무장치를 목표 기판에 대해 조작하기 위한 장치로서, 상기 분무장치를 X, Y 및 Z 방향으로 이동시키기 위한 구동기구와, 분무 노즐을 분무장치에 대해 회전 및 경사시키기 위한 별개의 기구를 구비하는 장치에 관한 것이다.
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公开(公告)号:KR1019970009399B1
公开(公告)日:1997-06-13
申请号:KR1019880014488
申请日:1988-11-04
Applicant: 다우 코닝 코포레이션
Inventor: 베드아이린구텍
IPC: C09D183/04
CPC classification number: H05K3/287 , C08L83/08 , C09D183/08 , H05K2201/09872 , C08L83/00 , C08L2666/28
Abstract: 내용 없음.
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公开(公告)号:US20240107658A1
公开(公告)日:2024-03-28
申请号:US18511466
申请日:2023-11-16
Applicant: Solid-tech Co., Ltd.
Inventor: Tzu Chien HUNG , Chun-Teng KO , Bomin TU , Zhengyu LEE
CPC classification number: H05K1/0209 , H05K1/0212 , H05K1/111 , H05K3/388 , H05K2201/09872 , H05K2203/0522
Abstract: This invention provides a carrier or submount for high power devices packaging and a method for forming the carrier or submount. The carrier comprises a thermal conductive ceramic substrate, a patterned adhesion layer on the substrate, a heat dissipation layer on the patterned adhesion layer, a conformal cover layer enclosing the heat dissipation layer and the adhesion layer, a diffusion barrier layer on the conformal cover layer, an eutectic bonding layer on the diffusion barrier layer, and a dissipation ceramic substrate with an L-shape bonding conductor, wherein one end of the L-shape bonding conductor bonds to the power device and the other end bonds to the conformal cover layer at the second region. The substrate includes a first region for bonding high power device, a second region for wire-bonding, and a third region for heat sink. The first region and second region are on a first surface of the substrate, and the third region is one the second surface, opposite to the first surface, of the substrate.
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公开(公告)号:US10064282B2
公开(公告)日:2018-08-28
申请号:US15158645
申请日:2016-05-19
Applicant: TactoTek Oy
Inventor: Mikko Heikkinen , Jarmo Sääski , Jarkko Torvinen
IPC: H01L23/00 , H05K1/18 , H05K1/02 , H01L33/52 , H01L23/498 , H01L23/538 , H01L51/00
CPC classification number: H05K1/186 , H01L23/4985 , H01L23/5387 , H01L33/52 , H01L51/0097 , H01L2224/1319 , H01L2933/005 , H05K1/0274 , H05K1/0298 , H05K1/189 , H05K3/284 , H05K2201/0129 , H05K2201/05 , H05K2201/09872 , H05K2201/10106 , H05K2201/10151 , H05K2203/1316 , H05K2203/1322
Abstract: A multilayer structure for an electronic device having a flexible substrate film (202) for accommodating electronics (204); at least one electronic component (204) provided on said substrate film (202); and a number of conductive traces (206) provided on said substrate film (202) for electrically powering and/or connecting electronics including said at least one electronic component (204), wherein at least one preferably thermoformed cover (210) is attached to said substrate film (202) on top of said at least one electronic component (204), the at least one thermoformed cover (210) and the substrate film (202) accommodating the electronics (204) being overmolded with thermoplastic material (208). The invention also relates to a method for manufacturing a multilayer structure for an electronic device.
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