公开(公告)号：US4446188A

公开(公告)日：1984-05-01

申请号：US105723

申请日：1979-12-20

Applicant: Harshad K. Patel ,  Andjelko Illick

Inventor： Harshad K. Patel ,  Andjelko Illick

IPC: B32B15/08 ,  H05K1/00 ,  H05K3/00 ,  H05K3/06 ,  H05K3/42 ,  H05K3/44 ,  H05K3/46 ,  B32B3/10 ,  B32B15/04

CPC classification number: H05K3/4641 ,  B32B15/08 ,  H05K1/0287 ,  H05K1/029 ,  H05K3/44 ,  H05K3/445 ,  H05K3/4635 ,  H05K1/0298 ,  H05K1/0393 ,  H05K2201/0355 ,  H05K2201/093 ,  H05K2201/09609 ,  H05K2201/09945 ,  H05K2203/0323 ,  H05K2203/1545 ,  H05K3/0052 ,  H05K3/064 ,  H05K3/427 ,  H05K3/429 ,  Y10S428/901 ,  Y10T428/24331 ,  Y10T428/24777 ,  Y10T428/31529 ,  Y10T428/31678 ,  Y10T428/31681 ,  Y10T428/31688 ,  Y10T428/31703 ,  Y10T428/31721 ,  Y10T428/31786

Abstract: A layered clad laminate with universal center plane adapted for the manufacture of printed wiring board comprising an electrically conductive self-sustaining, integral metal center sheet having, in repetitive fashion, a series of predetermined patterns of punched or photochemically developed openings therein, said sheet being pressed between electrical insulating layers of resin impregnated reinforcing material, said layers being adhered to said sheet and to each other through said openings, and on each of the outer surfaces of said laminate and adhered thereto a layer of electrically conductive metal foil which is essentially uniform and imperforate.

Abstract translation: 一种具有适于制造印刷线路板的通用中心平面的分层复合层压板，其包括导电自维持整体金属中心片，其重复地具有一系列预先设置的冲孔或光化学显影开口的图案，所述片是 被挤压在树脂浸渍的增强材料的电绝缘层之间，所述层通过所述开口粘附到所述片材并且彼此粘合，并且在所述层压体的每个外表面上并粘附到其上基本均匀的导电金属箔层 和无孔。

公开(公告)号：US3895181A

公开(公告)日：1975-07-15

申请号：US49938474

申请日：1974-08-21

Applicant: HONEYWELL INF SYSTEMS

Inventor： LAGRANGE JEAN-PAUL ,  DAVY GERALD ,  PROUIN JEAN-CLAUDE ,  LE GOVIC BERNARD ,  SANDOZ JEAN

IPC: H05K1/00 ,  H05K1/02 ,  H05K3/42

CPC classification number: H05K1/0228 ,  H05K1/0289 ,  H05K1/0296 ,  H05K1/0298 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09263 ,  H05K2201/09609 ,  H05K2201/09945

Abstract: An improved arrangement for connecting electrical circuits is formed by a plurality of superimposed insulating sheets joined together. At least one face of each of the sheets carries networks of conductive strips. The arrangement concludes linking members for electrically coupling conductive strips situated at different ones of said sheets and connecting members which connect the strips to the electrical circuits. The linking and connecting members are arranged in rows and columns defining corridors through which must pass the conductive strips. The general directions of the conductive strips are parallel to each other and to the corridors. At least one strip out of two is in the form of an offset line such that the average distance between two adjacent strips along their substantially parallel paths is greater than the distance which would separate them if they were entirely straight.

Abstract translation: 通过连接在一起的多个叠加的绝缘片形成用于连接电路的改进布置。 每个片的至少一个面承载导电条的网络。 该布置总结了用于将位于不同的所述片材的导电条和用于将条连接到电路的连接部件的电连接的连接部件。 连接和连接构件被布置成行和列，其限定通道，通过该走廊必须通过导电条。 导电条的一般方向彼此平行并且与走廊相平行。 两个中的至少一个条带是偏移线的形式，使得沿着它们基本上平行的路径的两个相邻条之间的平均距离大于如果它们完全是直的则将分离它们的距离。

公开(公告)号：US3626081A

公开(公告)日：1971-12-07

申请号：US3626081D

申请日：1969-12-22

Applicant: COMCET INC

Inventor： LITTLE RICHARD L

IPC: H05K1/14 ,  H05K1/16 ,  H05K3/34 ,  H05K3/36 ,  H05K1/04

CPC classification number: H05K1/162 ,  H05K1/141 ,  H05K3/3447 ,  H05K3/368 ,  H05K2201/049 ,  H05K2201/09309 ,  H05K2201/09609 ,  H05K2201/09945 ,  H05K2201/10189

Abstract: A unitary sandwich-type ground and voltage plane consisting of a first and second layer of conductive material separated by an insulator and having therein a plurality of spaced apertures in a pattern to conform to the spacing of connector terminals and having etched patterns on said first and second layers for enabling electrical connections to be made between appropriate terminals and the first and second conductive layers.

公开(公告)号：US3514326A

公开(公告)日：1970-05-26

申请号：US3514326D

申请日：1967-11-17

Applicant: MINNESOTA MINING & MFG

Inventor： STOW ROBERT H

IPC: H01B1/22 ,  H01B5/02 ,  H05K3/32 ,  H05K1/02

CPC classification number: H05K3/323 ,  H01B1/22 ,  H01B5/02 ,  H05K2201/09945 ,  Y10T428/256 ,  Y10T428/265 ,  Y10T428/28

公开(公告)号：US3250848A

公开(公告)日：1966-05-10

申请号：US30813963

申请日：1963-09-11

Applicant: RCA CORP

Inventor： BEELITZ HOWARD R ,  SCHNITZLER HANS F

IPC: H05K1/00 ,  H05K1/16 ,  H05K3/22 ,  H05K3/40 ,  H05K3/42 ,  H05K3/46

CPC classification number: H05K3/4038 ,  H05K1/0287 ,  H05K1/0292 ,  H05K1/0293 ,  H05K1/0298 ,  H05K1/16 ,  H05K3/429 ,  H05K3/4611 ,  H05K2201/0305 ,  H05K2201/09454 ,  H05K2201/096 ,  H05K2201/09845 ,  H05K2201/09945 ,  H05K2203/063 ,  H05K2203/173 ,  H05K2203/175

公开(公告)号：US10015880B1

公开(公告)日：2018-07-03

申请号：US14565227

申请日：2014-12-09

Applicant: Multek Technologies Ltd.

Inventor： Mark Bergman ,  Joan K. Vrtis

IPC: H05K1/02 ,  H05K3/22

CPC classification number: H05K1/0271 ,  H05K1/0278 ,  H05K1/028 ,  H05K1/0281 ,  H05K1/0283 ,  H05K1/038 ,  H05K1/0386 ,  H05K1/0393 ,  H05K1/144 ,  H05K1/148 ,  H05K3/22 ,  H05K3/4691 ,  H05K2201/0137 ,  H05K2201/05 ,  H05K2201/058 ,  H05K2201/09945 ,  H05K2201/0999 ,  H05K2201/2009

Abstract: A rip stop material is attached at a stress area of a flexible circuit board in order to strengthen the flexible circuit board and minimize ripping and cracking in the polyimide and/or the copper conductors of the circuit. A rip stop transition layer is formed and deposited at a location on the flexible circuit in order to minimize, reduce, if not preventing cracking and ripping of the circuit as it is bent and flexed. The rip stop transition layer can be placed at different locations on and within the flexible circuit in order to minimize cracking and ripping as the flexible circuit is bent, flexed and twisted.

公开(公告)号：US20170181277A1

公开(公告)日：2017-06-22

申请号：US15363579

申请日：2016-11-29

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： YOSHIHIRO TOMITA ,  KOICHI HIRANO ,  SUSUMU SAWADA ,  KOJI KAWAKITA ,  TAKASHI ICHIRYU ,  MASANORI NOMURA

IPC: H05K1/03 ,  H05K1/18

CPC classification number: H05K1/038 ,  H05K1/0283 ,  H05K1/0366 ,  H05K1/18 ,  H05K1/189 ,  H05K3/202 ,  H05K2201/0133 ,  H05K2201/029 ,  H05K2201/05 ,  H05K2201/09227 ,  H05K2201/09263 ,  H05K2201/09945

Abstract: A flexible substrate is provided with: a stretchable sheet; a member located on the sheet; and a stretchable strip connected to the member, and located on the sheet. When the amount of extension of the sheet is equal to or less than a predetermined value, the sheet has a first elastic modulus, and when the amount of extension of the sheet exceeds the predetermined value, the sheet has a second elastic modulus that is greater than the first elastic modulus and greater than the elastic modulus of the strip.

公开(公告)号：US20170133307A1

公开(公告)日：2017-05-11

申请号：US15159212

申请日：2016-05-19

Applicant: STMicroelectronics S.r.l.

Inventor： Federico Giovanni Ziglioli

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L21/4846 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0538 ,  H01L2924/06 ,  H01L2924/07025 ,  H01L2924/14 ,  H01L2924/15747 ,  H05K1/0287 ,  H05K1/0289 ,  H05K1/0295 ,  H05K1/112 ,  H05K3/107 ,  H05K3/205 ,  H05K3/4015 ,  H05K3/4046 ,  H05K2201/09409 ,  H05K2201/09945 ,  H05K2201/10378 ,  H05K2203/025 ,  H05K2203/0338 ,  H05K2203/0361 ,  H05K2203/0369 ,  H05K2203/1189 ,  H05K2203/143 ,  H05K2203/1461 ,  H05K2203/1476 ,  H05K2203/308 ,  H01L2224/45099

Abstract: A substrate for mounting a semiconductor device includes an insulating layer having first and second opposed surfaces defining a thickness. First and second electrically conductive lands are included in the insulating layer. The first electrically conductive lands extend through the whole thickness of the insulating layer and are exposed on both the first and second opposed surfaces. The second electrically conductive lands have a thickness less than the thickness of the insulating layer and are exposed only at the first surface. Electrically conductive lines at the first surface of the insulating layer couple certain ones of the first electrically conductive lands with certain ones of the second electrically conductive lands. The semiconductor device is mounted to the first surface of the insulating layer. Wire bonding may be used to electrically coupling the semiconductor device to certain ones of the first and second lands.

公开(公告)号：US09521748B1

公开(公告)日：2016-12-13

申请号：US14565267

申请日：2014-12-09

Applicant: Multek Technologies Ltd.

Inventor： Mark Bergman ,  Joan K. Vrtis

IPC: H05K1/02 ,  H05K1/03 ,  H05K1/14 ,  H05K3/22

CPC classification number: H05K1/0271 ,  H05K1/0278 ,  H05K1/028 ,  H05K1/0281 ,  H05K1/0283 ,  H05K1/038 ,  H05K1/0386 ,  H05K1/0393 ,  H05K1/144 ,  H05K1/148 ,  H05K3/22 ,  H05K3/4691 ,  H05K2201/0137 ,  H05K2201/05 ,  H05K2201/058 ,  H05K2201/09945 ,  H05K2201/0999 ,  H05K2201/2009

Abstract: Mechanical measures strengthen a flexible circuit board or deformable electronic by manipulating the location and/or intensity of the stress concentration or to limit bending, torsion, and stretching. A material layer is patterned onto the flexible circuit board with a specific pattern and place of deposition in order to modify the stress concentration and profile of the circuit board and increase its overall strength. The material layer may be configured to modify the stress concentrations during bending away from the weak points in the assembly or to spread the stress during bending by increasing the radius of the bend curvature and therefore decreasing the chance of mechanical failure.

Abstract translation: 机械措施通过操纵应力集中的位置和/或强度或限制弯曲，扭转和拉伸来加强柔性电路板或可变形电子。 将材料层图案化到具有特定图案和沉积位置的柔性电路板上，以便改变电路板的应力集中和轮廓并增加其整体强度。 材料层可以被配置为在远离组件中的弱点的过程中修改弯曲期间的应力集中，或者通过增加弯曲曲率半径来扩展弯曲过程中的应力，从而降低机械故障的机会。

公开(公告)号：US20070212521A1

公开(公告)日：2007-09-13

申请号：US10593622

申请日：2005-03-29

Applicant: Hisami Bessho ,  Hideyuki Sato ,  Akio Sato ,  Masatsugu Shimomura ,  Masaru Tanaka ,  Hiroshi Yabu

Inventor： Hisami Bessho ,  Hideyuki Sato ,  Akio Sato ,  Masatsugu Shimomura ,  Masaru Tanaka ,  Hiroshi Yabu

IPC: B32B3/10

CPC classification number: H01R12/7076 ,  C09J7/22 ,  C09J7/26 ,  C09J2201/128 ,  C09J2201/602 ,  H01R13/2414 ,  H05K3/323 ,  H05K2201/0116 ,  H05K2201/09945 ,  H05K2201/10378 ,  Y10T428/24322

Abstract: To provide an anisotropic conductive film which can respond to increasing pitch reduction of connection targets while maintaining connection reliability, and can be manufactured at a lower cost than conventional, and to provide a method of manufacturing the same. The anisotropic conductive film is provided with a porous film consisting of polymer, having numerous holes penetrating in a film thickness direction, the holes being in a honeycomb arrangement and having inner wall surfaces which curve outwards, a conductive material that fills the holes in the porous film, and an adhesive layer coated on both surfaces of the porous film. The porous film is formed by leaving a supporting substrate on which cast is a polymer solution where a polymer is dissolved in a hydrophobic, volatile organic solvent, under high humidity conditions.

Abstract translation: 为了提供能够对维持连接可靠性的连接目标的减小的增加作出响应的各向异性导电膜，并且可以以比传统的更低的成本制造并提供其制造方法。 各向异性导电膜设置有由聚合物组成的多孔膜，其具有沿膜厚度方向穿透的多个孔，该孔为蜂窝结构，并且具有向外弯曲的内壁表面，填充多孔的孔的导电材料 膜和涂覆在多孔膜的两个表面上的粘合剂层。 多孔膜通过在高湿度条件下留下支撑基底而形成，其上浇注聚合物溶液，其中聚合物溶解在疏水性挥发性有机溶剂中。