Abstract:
본발명은반도체패키지및 그제조방법을제공한다. 반도체패키지제조방법은복수개의적층된하부반도체칩들을포함하는하부스택을기판에실장하는것; 및복수개의적층된상부반도체칩들을포함하는상부스택을상기하부스택상에실장하는것을포함할수 있다. 본발명에따르면, 반도체패키지가용이하게제조될수 있다.
Abstract:
본 발명은 본체와, 본체를 이동시키는 이동 어셈블리와, 본체에 마련되어 바닥 면의 청소를 수행하는 청소 툴을 포함하는 청소 로봇의 제어 방법에 있어서, 외부의 단말기와 통신을 수행하여 단말기에서 작성된 맵을 수신하고. 작성된 맵의 정보에 기초하여 이동 어셈블리의 이동 및 청소 툴의 구동을 제어한다. 본 발명은 단말기를 이용하여 사용자 주도적으로 홈 내의 맵을 작성하고 이를 청소 로봇에 전달하여 청소 로봇의 청소용 맵으로 맵으로 활용함으로써, 맵 작성에 소비되는 시간을 줄일 수 있고, 맵의 정확도를 향상시킬 수 있으며 이로 인해 청소 능력을 향상시킬 수 있다. 또한 사용자가 청소하고 싶은 영역을 지정하면 청소 로봇이 손쉽고 빠르게 해당 영역으로 이동하여 청소할 수 있어 사용자의 만족도를 향상시킬 수 있으며, 사용자에게 편의성을 제공해 줄 수 있다.
Abstract:
The present invention relates to a robot cleaner which enables a wet cleaning, has a cleaning unit which is installed to be replaceable, and secures enough frictional force for performing a wet cleaning on the floor. The robot cleaner according to an embodiment of the present invention includes a frame which has wheels for driving; a cleaning unit which cleans the floor by being installed on the lower part of the frame and is positioned in the front side of the wheels; a water tank which supplies water to the cleaning unit by being positioned on the upper side of the wheels; a pump which pumps water accommodated in the water tank so that water in the water tank can be supplied to the cleaning unit; a hose which is extended to the pump and the upper part of the cleaning unit and makes water which is pumped by the pump flow; and a bumper which is installed on the lateral side of the frame, wherein the cleaning unit is installed to be replaceable.
Abstract:
PURPOSE: A semiconductor chip with a through silicon via and a manufacturing method thereof are provided to reduce manufacturing processes by using a phase shift mask. CONSTITUTION: A silicon substrate includes a first surface and a second surface. A through silicon via (140) passes through the silicon substrate. A polymer pattern layer (150) is formed on the second surface of the silicon substrate. A plating pad (160) is formed on the polymer pattern layer and partially covers the through silicon via.
Abstract:
PURPOSE: A semiconductor device including a penetration electrode and a manufacturing method thereof are provided to secure the uniformity of the protrusion length of the penetration electrode and to improve a step coverage by forming a fluid chemical vapor deposition layer. CONSTITUTION: A penetration electrode (120) is extended from the upper side to the lower side of a substrate (100). A via insulation layer (111) is formed between the penetration electrode and the substrate. The penetration electrode protrudes outside the recessed bottom of the substrate. A first bottom insulation layer (109) is formed on the recessed bottom of the substrate. The penetration electrode is exposed.
Abstract:
PURPOSE: A semiconductor device including a penetration electrode and a manufacturing method thereof are provided to sufficiently secure a process margin by forming a thick fluid chemical vapor deposition layer under the penetration electrode. CONSTITUTION: A via hole which vertically passes through a substrate (100) is formed. Via insulation layers (110a) are formed on the bottom and the inner sidewall of the via hole. A penetration electrode (120) is formed in the via hole with the via insulation layers. The penetration electrode has a pillar shape recessed from an inactive surface (100c) of the substrate. The penetration electrode is exposed by patterning the lower side of the substrate.
Abstract:
PURPOSE: A semiconductor device and a method for manufacturing the same are provided to prevent the generation of voids by using an insulating pattern which partly covers the lateral part of a conductive pattern. CONSTITUTION: A semiconductor substrate has a surface. A first conductive pattern(204) with a first size is exposed to the surface. A barrier pattern has a second size which is larger than the first size. A second conductive pattern(208) has a third size which is smaller than the second size. An insulating pattern(212) is formed on both sidewalls of the second conductive pattern.