公开(公告)号：WO2007036394A1

公开(公告)日：2007-04-05

申请号：PCT/EP2006/065362

申请日：2006-08-16

Applicant: ROBERT BOSCH GMBH ,  KNAB, Norbert ,  BREITLING, Wolfram

Inventor： KNAB, Norbert ,  BREITLING, Wolfram

IPC: H05K1/02

CPC classification number: H05K1/0268 ,  H05K1/0256 ,  H05K3/202 ,  H05K2201/0761 ,  H05K2201/09236 ,  H05K2201/09772

Abstract: Vorgeschlagen wird eine Vorrichtung (10) zur Fehlerstromerkennung in einem elektronischen Gerät (12), mit zumindest einem ersten elektrischen Leiter (16), der ein erstes elektrisches Potential (V 1 ) führt, und mit einem Senseleiter (22), der ein elektrisches Ruhepotential (V R ) aufweist, das zwischen dem ersten elektrischen Potential (V 1 ) und einem weiteren elektrischen Potential (V 2 ) liegt. Die erfindungsgemäße Vorrichtung (10) ist dadurch gekennzeichnet, dass der zumindest eine erste elektrische Leiter (16) und der Senseleiter (22) auf und/oder in einem Isolationsmaterial (24) voneinander beabstandet angeordnet sind, wobei mittels des Senseleiters (22) im Fehlerfall eine Reduzierung der Isolationseigenschaften des Isolationsmaterials (24) durch eine Verschiebung des elektrischen Ruhepotentials (V R ) erkennbar ist.

Abstract translation: 公开了一种用于剩余电流检测在电子装置（12）的装置（10），具有至少一个第一电导体（16），（V _{1 ）携带第一电势，和（具有检测头 22）具有电静态电势（V - [R ），该（第一电位V 1 ）和另一电势（V 2 ）是。 本发明的装置（10）的特征在于，所述至少一个第一电导体（16）和感测导体（22）在故障的情况下设置在和/或在彼此间隔的绝缘材料（24），其特征在于，通过感测导体（22）的装置 由电静息电位的位移的减少，绝缘材料（24）的绝缘性的（V - [R ）是显而易见的。}

公开(公告)号：EP1932400B1

公开(公告)日：2015-11-04

申请号：EP06792843.2

申请日：2006-08-16

Applicant: ROBERT BOSCH GMBH

Inventor： KNAB, Norbert ,  BREITLING, Wolfram

IPC: H05K1/02

CPC classification number: H05K1/0268 ,  H05K1/0256 ,  H05K3/202 ,  H05K2201/0761 ,  H05K2201/09236 ,  H05K2201/09772

公开(公告)号：EP2706829A3

公开(公告)日：2014-06-11

申请号：EP13179343.2

申请日：2013-08-06

Applicant: CANON KABUSHIKI KAISHA

Inventor： Ohira, Masaharu

IPC: H05K1/11 ,  H05K1/02 ,  H05K13/04

CPC classification number: H05K1/0271 ,  H05K1/0207 ,  H05K1/113 ,  H05K13/0465 ,  H05K2201/09772

Abstract: Provided is a printed wiring board including a first heat dissipation pattern placed in one surface layer on which a semiconductor package is to be mounted, a second heat dissipation pattern placed in the other surface layer, and an inner layer conductor pattern placed in an inner layer, in which through holes are formed in the printed wiring board; the first heat dissipation pattern has a joint portion which is placed in an opposed region opposed to a heat sink of the semiconductor package and which is joined to the heat sink with solder; at least one of the through holes is placed in the opposed region; and the second heat dissipation pattern is formed in a pattern in which an end portion of a conductor film in the one of the through holes on the other surface layer side is separated.

公开(公告)号：EP2209357A1

公开(公告)日：2010-07-21

申请号：EP10150091.6

申请日：2010-01-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Han, Jang Soon ,  Lee, Seung Myen

IPC: H05K1/02

CPC classification number: H05K1/0216 ,  H05K1/0231 ,  H05K2201/093 ,  H05K2201/09336 ,  H05K2201/09772 ,  H05K2201/10522 ,  H05K2201/10545 ,  H05K2201/10689

Abstract: A printed circuit board (PCB) reduces a simultaneous switching noise (SSN) causing power noise, thereby reducing radiated electromagnetic interference (EMI). In a double-layered PCB, a first substrate is arranged in parallel with a second substrate while being spaced apart from the second substrate by a predetermined distance. The first substrate includes a ground plane, which is deposited over an entirety of the first substrate. The second substrate includes a power plane deposited at a position of a component mounted to the printed circuit board (PCB) to transmit power to the component. Thus, the power trace of the PCB is simplified in structure, thereby reducing EMI radiation noise.

Abstract translation: 印刷电路板（PCB）降低了同时开关噪声（SSN），从而降低了电源噪声，从而降低了辐射电磁干扰（EMI）。 在双层PCB中，第一基板与第二基板平行布置，同时与第二基板隔开预定距离。 第一衬底包括沉积在整个第一衬底上的接地平面。 第二基板包括沉积在安装到印刷电路板（PCB）的部件的位置处的电源平面，以向部件传输电力。 因此，PCB的功率迹线结构得到了简化，从而降低了EMI辐射噪声。

公开(公告)号：EP1336202A2

公开(公告)日：2003-08-20

申请号：EP01921149.9

申请日：2001-02-10

Applicant: ROBERT BOSCH GMBH

Inventor： FAUSER, Edwin ,  ROOZENBEEK, Herman ,  SCHILLING, Wolfgang ,  SEITEL, Hans ,  WIZEMANN, Thomas ,  PFENDTNER, Reinhard ,  BUTSCHKAU, Werner ,  HILLER, Wolfgang ,  JOSTEN, Stefan

IPC: H01L29/00

CPC classification number: H05K9/0066 ,  H01T4/08 ,  H05K1/026 ,  H05K1/0272 ,  H05K3/305 ,  H05K3/3442 ,  H05K2201/09772 ,  H05K2201/10295 ,  H05K2201/10636 ,  Y02P70/611

Abstract: According to the invention, the protection device is provided with a first electroconductive structure which is conductively linked to the endangered contact element, in addition to a second electroconductive structure which is arranged in an adjacent position thereto on the carrier structure and is electroconductively linked to the ground connection. Facing sections of the electroconductive structures are physically separated from each other by means of a defined gap, whereby an excess voltage which is transmitted to the contact element is transmitted from the first electroconductive structure to the section of the second electroconductive structure by a spark discharge in the gap of the section and deviated to the ground connection.

公开(公告)号：EP1141887B1

公开(公告)日：2003-02-05

申请号：EP99973502.0

申请日：1999-11-29

Applicant: Gemplus

Inventor： ODDOU, Laurent ,  AYALA, Stéphane ,  ZAFRANY, Micha[l

IPC: G06K19/077

CPC classification number: G06K19/0775 ,  G06K19/07749 ,  H01L24/24 ,  H01L2224/83192 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/28 ,  H05K3/284 ,  H05K3/305 ,  H05K2201/09772 ,  H05K2201/10727 ,  Y02P70/613 ,  Y10S257/922 ,  H01L2924/00

Abstract: The invention concerns a method for making a contactless chip card comprising an electronic module (600), and connected to said module, an antenna (200). The inventive method comprises the following steps: producing, on a first support sheet (100), the antenna (200) provided at its ends, with connection terminals (250); producing an insulating bridge (300) partly covering the antenna (200) coils except for the connection terminals (250); depositing a drop of filling material (500) on the insulating bridge; transferring the electronic module (600), its connection pads (610) being oriented towards the insulating bridge (300); then providing an electric connection between the module (600) contact pads and the antenna (200) connection terminals (250).

公开(公告)号：EP0926930A3

公开(公告)日：2000-06-28

申请号：EP98309866.6

申请日：1998-12-02

Applicant: Hewlett-Packard Company

Inventor： Wharton, Robert J. ,  Daniel, Eric R. ,  Brown, Joseph D.

IPC: H05K1/11 ,  H05K1/02 ,  H05K13/08 ,  G01R31/28

CPC classification number: G01R31/316 ,  H05K1/0268 ,  H05K1/111 ,  H05K3/3436 ,  H05K13/08 ,  H05K2201/0761 ,  H05K2201/09345 ,  H05K2201/09772 ,  H05K2201/10106 ,  H05K2201/10734 ,  Y02P70/611

Abstract: A printed circuit board (10) has a first image (11). In the first image (11) there is a first ball grid array pattern (61) for attaching a first input/output ball grid array package. The first ball grid array pattern (61) includes a de-populated center area. A first surface insulation resistance pattern (62) is laid out within the de-populated center area of the first ball grid array pattern (61). A second ball grid array pattern (24) also may be contained within the first image (11). The second ball grid array pattern (24) is for attaching a second input/output ball grid array package. The second ball grid array pattern (24) has rows of interconnect pads (81). A second surface insulation resistance pattern (82) is laid out between the rows of interconnect pads (81).

公开(公告)号：EP0308296B1

公开(公告)日：1994-02-16

申请号：EP88402237.7

申请日：1988-09-06

Applicant: TELEMECANIQUE

Inventor： Gohl, Pierre ,  Llabres, Raymond ,  Malgouires, Pascal

IPC: H05K7/20

CPC classification number: H05K7/205 ,  H05K1/0209 ,  H05K3/3447 ,  H05K2201/066 ,  H05K2201/09772 ,  H05K2201/09781 ,  H05K2201/10689

公开(公告)号：EP1698033A2

公开(公告)日：2006-09-06

申请号：EP04817915.4

申请日：2004-12-22

Applicant: X2Y Attenuators, L.L.C.

Inventor： ANTHONY, David ,  ANTHONY, Anthony ,  ANTHONY, William, M. ,  MUCCIOLI, James ,  NEIFELD, Richard, A.

IPC: H02H9/00

CPC classification number: H01G4/35 ,  H01L23/552 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01P1/203 ,  H05K1/0233 ,  H05K2201/09254 ,  H05K2201/0969 ,  H05K2201/09772 ,  H05K2201/09781 ,  H05K2201/1006 ,  H05K2201/10454 ,  H05K2201/10636 ,  Y02P70/611 ,  H01L2924/00

Abstract: An energy conditioner structure comprising a first electrode (120), a second electrode (80), and a shield structure (70, 110, 150) provides improved energy conditioning in electrical circuits. The structures may exist as discrete components or part of an integrated circuit. The shield structure in the energy conditioner structure does not electrically connect to any circuit element.

公开(公告)号：EP1684560A2

公开(公告)日：2006-07-26

申请号：EP06075019.7

申请日：2006-01-06

Applicant: Delphi Technologies, Inc.

Inventor： Kulhman, Frederick F. ,  Duff, Brentt C. ,  Pepples, Michael J.

IPC: H05K1/18 ,  H05K3/34

CPC classification number: H05K3/3452 ,  H05K1/181 ,  H05K3/3442 ,  H05K3/3489 ,  H05K2201/09772 ,  H05K2201/09909 ,  H05K2201/10022 ,  H05K2201/10636 ,  Y02P70/611 ,  Y02P70/613

Abstract: An electronic assembly (200) includes a substrate (10) and at least one surface mounted electronic component (14). The substrate (10) includes a first side and a second side opposite the first side. The first side of the substrate (10) includes a plurality of conductive traces formed thereon. The plurality of conductive traces includes a first conductive trace (18A) and a second conductive trace (18B). The electronic component (14) is electrically coupled between the first and second conductive traces (18A,18B). A component body of the electronic component (14) is subject to interaction with a flux, which is utilized during electrical coupling of the electronic component (14) to the first and second conductive traces (18A,18B), to form a current leakage path. The substrate (10) is configured to prevent the formation of the current leakage path.

Abstract translation: 电子组件（200）包括基板（10）和至少一个表面安装的电子部件（14）。 基板（10）包括与第一侧相对的第一侧和第二侧。 基板（10）的第一面包括形成在其上的多个导电迹线。 多个导电迹线包括第一导电迹线（18A）和第二导电迹线（18B）。 电子部件（14）电耦合在第一和第二导电迹线（18A，18B）之间。 电子部件（14）的组件主体经受与在电子部件（14）电耦合到第一和第二导电迹线（18A，18B）的电耦合期间所使用的焊剂的相互作用，以形成电流泄漏路径 。 基板（10）被配置为防止形成电流泄漏路径。