公开(公告)号：JPH08286705A

公开(公告)日：1996-11-01

申请号：JP18555395

申请日：1995-07-21

Applicant: CONS RIC MICROELETTRONICA

Inventor： GAETAANO JIYUDEIICHIE ,  MATSUTEO RO PURESUTEI ,  RUIIJI FUORUTOUUNA

IPC: G05B13/02 ,  B25J9/16 ,  G05D3/12 ,  G05D19/02

Abstract: PROBLEM TO BE SOLVED: To provide a fuzzy control process for quick damping of mechanical vibration and for positioning and device therefor. SOLUTION: The device includes two fuzzy controllers 10, 11 to provide a control signal based on the measurement of position and vibration. The process includes processing that deformation of a mechanical element and a position thereof are measured, a position error and a vibration error are generated through the comparison with a reference value, a differentiated value of the position error and a differentiated value of the vibration error are generated, fuzzy control is applied to the position error and the vibration error, the differentiated value of the position error and the differentiated value of the vibration error to generate a proper control signal (u) to drive the mechanical element 1.

公开(公告)号：JPH08279554A

公开(公告)日：1996-10-22

申请号：JP7690896

申请日：1996-03-29

Applicant: CONS RIC MICROELETTRONICA

Inventor： ZAMBRANO RAFFAELE

IPC: H01L29/73 ,  H01L21/331 ,  H01L21/76 ,  H01L21/762 ,  H01L21/763 ,  H01L21/8222 ,  H01L21/8234 ,  H01L27/06 ,  H01L27/082 ,  H01L27/088 ,  H01L29/732 ,  H01L29/78

Abstract: PROBLEM TO BE SOLVED: To provide a method for forming a structure which isolates two regions of an integrated circuit. SOLUTION: In a method for forming a dialectic isolation structure between two regions of an integrated circuit where active regions of electronic components are already defined on a semiconductor substrate, the method includes a step for defining an isolation region 45 on a silicon oxide layer 42 which covers a silicon layer 41, a step for forming the isolation layer 45 by selectively etching the silicon layer 41, a step for growing a thermal oxide 43 on the inner surface of the isolation layer 45, a step for stacking a dialectic layer such that it aligns, and a step for oxidizing the stacked dialectic layer.

公开(公告)号：JPH08275506A

公开(公告)日：1996-10-18

申请号：JP20714595

申请日：1995-08-14

Applicant: CONS RIC MICROELETTRONICA ,  ST MICROELECTRONICS SRL

Inventor： PULVIRENTI FRANCESCO ,  GARIBOLDI ROBERTO

IPC: H02M3/07

Abstract: PROBLEM TO BE SOLVED: To obtain two ways of use for enabling finding out the advantageous use of a charge pump MOS voltage booster and boosters of this type. SOLUTION: A voltage booster is equipped with four MOS transistors (M1, M2, M3, M4) in place of a classical diode showing an undesirable voltage drop and with an oscillator having two output terminals and two corresponding charge transfer capacitors, in place of a classical oscillator of a single output having relevant charge transfer capacitors. In this method, the undesirable voltage drop substantially does not exist, and ripples are reduced without making a circuit complicated.

公开(公告)号：JPH08274109A

公开(公告)日：1996-10-18

申请号：JP27773995

申请日：1995-10-25

Applicant: CONS RIC MICROELETTRONICA

Inventor： ZAMBRANO RAFFAELE ,  FALLICO GIUSEPPE

IPC: H01L29/73 ,  H01L21/331 ,  H01L29/10 ,  H01L29/423 ,  H01L29/732

Abstract: PROBLEM TO BE SOLVED: To improve the speed performance of a high-frequency bipolar- transistor structure. SOLUTION: The structure of a high-frequency bipolar transistor has an intrinsic base region 6 surrounded by an extrinsic base region 5 and has a first conductivity type base region 4 formed in a second conductivity type silicon layer 3 and a second conductivity type emitter region 7 formed at the inner side of the intrinsic base region 6. A first polysilicon layer 9 and a second polysilicon layer 15 are brought into contact with the extrinsic base region 5 and the emitter region 7, respectively. The first and second polysilicon layers 9 and 15 are brought into contact with a base metal electrode 13 and an emitter metal electrode 16, respectively. A silicide layer 8 is provided between the extrinsic base region 5 and the first polysilicon layer 9, and the extrinsic base resistance of the bipolar transistor is decreased.

公开(公告)号：JPH08272886A

公开(公告)日：1996-10-18

申请号：JP35271495

申请日：1995-12-27

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： BRUCCOLERI MELCHIORRE ,  COSENTINO GAETANO ,  DEMICHELI MARCO ,  PORTALURI SALVATORE

IPC: G06G7/16 ,  G06G7/163

Abstract: PROBLEM TO BE SOLVED: To compensate for an output signal error which is caused by an analog multiplier having at least one differential output column. SOLUTION: An output signal error is compensated for by flowing base current replica of a bipolar transistor to a precompensation column transistor which drives emitter-coupled bipolar transistors (Q3 and Q4) that constitute a differential column of an analog multiplier.

公开(公告)号：JPH08213614A

公开(公告)日：1996-08-20

申请号：JP19759695

申请日：1995-08-02

Applicant: ST MICROELECTRONICS SRL ,  CONS RIC MICROELETTRONICA

Inventor： FERLA GIUSEPPE ,  FRISINA FERRUCCIO

IPC: H01L21/60 ,  H01L21/768 ,  H01L23/12 ,  H01L23/482 ,  H01L23/495 ,  H01L23/522 ,  H01L29/417 ,  H01L29/78

Abstract: PROBLEM TO BE SOLVED: To reduce a parasitic resistance value and inductance of wire and pin by separating units comprising a plurality of function units with such a region of a semiconductor layer as no function unit is formed. SOLUTION: A semiconductor material layer 5 is selectively coated with an insulated gate layer 11 extending on a first doped region 7, and the gate layer 11 is made to contact gate metal meshes 101 and 102 connected to at least one gate metal pad, while surrounding a source metal plate 100. By connecting the gate metal pad to each pin P8 of a package with each bonding wire W8, all MOSFET units among all the MOSEFT units are connected in parallel. Thus, the maximum current capacity of the power device can be re- established, while each source electrode pin can be electrically speared according to individual purposes, resulting in significantly improved freedom in design.

公开(公告)号：JPH08190628A

公开(公告)日：1996-07-23

申请号：JP20877595

申请日：1995-08-16

Applicant: ST MICROELECTRONICS SRL ,  CONS RIC MICROELETTRONICA

Inventor： PENNINO LAURA ,  MANCUSO MASSIMO ,  TRAVAGLIA FEDERICO ,  POLUZZI RINALDO ,  RIZZOTTO GIANGUIDO

IPC: G06F9/44 ,  G06N7/02 ,  G06T5/00 ,  G06T5/20

Abstract: PROBLEM TO BE SOLVED: To perform an excellent noise reduction operation while preserving useful high-pass (high band) information. SOLUTION: This device is provided with an interface 1 for obtaining the gray levels of the pixel to be processed of images and the adjacent pixel, a difference circuit 2 for generating the difference of the gray levels of the pixel to be processed and the adjacent pixel, a fuzzy flat area smoothing circuit 8 for performing the low-pass (low band) smoothing of an almost uniform area stipulated by the pixel and the adjacent pixel, an edge preservation smoothing circuit 9 for performing a low-pass filtering processing to a high frequency information area stipulated by the pixel and the adjacent pixel, an area voter circuit 4 for supplying a measurement value for examining whether or not the area stipulated by the pixel and the adjacent pixel is almost uniform and a soft switching circuit 10 for weighting the output of the smoothing circuits 8 and 9 based on the measurement value.

公开(公告)号：JPH08102873A

公开(公告)日：1996-04-16

申请号：JP10261495

申请日：1995-04-26

Applicant: CONS RIC MICROELETTRONICA ,  ST MICROELECTRONICS SRL

Inventor： MANCUSO MASSIMO ,  POLUZZI RINALDO ,  RIZZOTTO GIANGUIDO

IPC: H03H21/00 ,  H04N5/21 ,  H04N5/44 ,  H04N9/64

Abstract: PURPOSE: To reduce noise of a television signal and also perform simultaneous scan conversion by including a noise reducing circuit and a simultaneous scan conversion circuit of a TV signal. CONSTITUTION: A filter archtecture is provided with at least one filter 3 which has plural digital inputs Pi and X that receive television signal elements through an interface and also has a few outputs NR and includes at least one interpolating block which takes a result of a filtering operation for noise that is associated with a television signal by the outputs NR, is connected to an input in the filter 3, also operates in fuzzy theory and executes scan conversion of a television signal that should be presented to other outputs SRC of the filter 3.

公开(公告)号：JPH0845869A

公开(公告)日：1996-02-16

申请号：JP18542995

申请日：1995-07-21

Applicant: CONS RIC MICROELETTRONICA

Inventor： ANNA BATSUTAGURIA ,  PIEERUJIYORUJIO FUARIKA ,  KESAARE RONSHISUBATSURE ,  SARUBATOORE KOTSUFUA ,  BIITO RAINERI

IPC: H01L21/22 ,  H01L21/265 ,  H01L21/322 ,  H01L21/331 ,  H01L21/336 ,  H01L21/8222 ,  H01L29/06 ,  H01L29/10 ,  H01L29/167 ,  H01L29/32 ,  H01L29/78

Abstract: PROBLEM TO BE SOLVED: To locally reduce charge carrier life in an integrated device by injecting ions into an active region of the integrated device, where rare gas ions form bubbles, by a large beam amount and at a high energy level. SOLUTION: A field oxide film is grown on an epitaxial layer 2 on a semiconductor substrate 1. Then, acceptor atoms are diffused in the epitaxial layer 2, to form an active region comprising P deep main-body regions 3a and 3b. Next, P main-body regions 4a and 4b are formed while leaving a gate oxide film 10a on which a polysilicon gate 6 is deposited, oxide films 10d and 10c, and silicon layers 6b and 6c, on the two boundaries of the device. Next, source regions 5a to 5d are formed, and before impurities are injected into the source regions, a large amount of helium is injected at an energy level such that a layer including helium bubbles 71a to 71d surrounds the source regions. Thus, the helium bubbles are formed at a deep base position in the deep main-body regions of a parasitic transistor 9.

公开(公告)号：JPH0822995A

公开(公告)日：1996-01-23

申请号：JP6864092

申请日：1992-03-26

Applicant: CONS RIC MICROELETTRONICA ,  SGS THOMSON MICROELECTRONICS

Inventor： FUERUTSUCHIO FURIISHINA ,  JIYUSETSUPE FUERURA

IPC: H01L29/73 ,  H01L21/22 ,  H01L21/322 ,  H01L21/331 ,  H01L21/8222 ,  H01L27/07 ,  H01L27/082 ,  H01L29/732 ,  H01L29/861

Abstract: PURPOSE: To make it possible to form a single integration structure containing a bipolar power element and a fast diode. CONSTITUTION: This structure of a bipolar element and a fast diode consists of a single chip 1 of semiconductor material, and the single chip contains a region 32 containing long-life minority carriers where a bipolar power element having a high current density is to be formed, and at least one region 20, 21 containing short-life minority carriers where a fast diode is to be formed.