公开(公告)号：JPH0690008A

公开(公告)日：1994-03-29

申请号：JP15141493

申请日：1993-05-27

Applicant: ST MICROELECTRONICS SRL

Inventor： CLEMENTI CESARE ,  GHIDINI GABRIELLA ,  TOSI MARINA

IPC: G11C17/00 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/51 ,  H01L29/788 ,  H01L29/792 ,  G11C16/02

Abstract: PURPOSE: To provide the device with less defects in the case, wherein it is required not only to decrease merely the width, depth, and the thickness of a layer and the like in the scale down of the device but also to hold the fundamental electric performance of an integrated structure and the O-N-O structure for this purpose is proposed. CONSTITUTION: The nitride surface layer of polysilicon is formed by treating the surface of a polysilicon layer 5 in nitrogen atmosphere at the temperature of 900 deg.C to 1,100 deg.C for 15 to 150 seconds. The nitride silicon layer is deposited on the surface. Under the temperature of 900 deg.C to 1,000 deg.C in the presence of water vapor, the silicon-nitride deposited layer is oxidized so as to have the thickness of 20 nm from the silicon-oxide insulating layer 5, and a plurality of layers 6 are formed.

公开(公告)号：JPH0637548A

公开(公告)日：1994-02-10

申请号：JP12003393

申请日：1993-05-21

Applicant: ST MICROELECTRONICS SRL

Inventor： NEBULONI DANIELA ,  FASSINA ANDREA

IPC: H03F1/00 ,  H03F1/30 ,  H03G3/34

Abstract: PURPOSE: To provide a turn-off control circuit for removing noise produced when a sound amplifier is turned off. CONSTITUTION: A clock means constituted of a control means 13 connected to a power line 11, a filter 17 as a voltage source connected to the control means 13 and a transistor 10 where an emitter is connected to the output terminal of the sound amplifier 1, is grounded through a switch 15 and a base is connected to the control means is provided.

公开(公告)号：JPH065792A

公开(公告)日：1994-01-14

申请号：JP2566293

申请日：1993-02-15

Applicant: ST MICROELECTRONICS SRL

Inventor： CONSIGLIO PIETRO ,  ERRATICO PIETRO

IPC: H01L27/08 ,  H01L27/02

Abstract: PURPOSE: To maintain a required function, even when a voltage lower than a reference voltage of a substrate is applied to a circuit. CONSTITUTION: This substrate insulating device comprises a power source terminal connected to a terminal 106 of a functional integrated element 100. The element 100 has at least one junction reversely biased, with respect to the substrate 104 specified with the element 100 thereon.

公开(公告)号：JPH05251555A

公开(公告)日：1993-09-28

申请号：JP32069592

申请日：1992-11-30

Applicant: ST MICROELECTRONICS SRL

Inventor： CEREDA MANLIO SERGIO ,  GINAMI GIANCARLO ,  LAURIN ENRICO ,  RAVAGLIA ANDREA

IPC: H01L21/76 ,  H01L21/316 ,  H01L21/762 ,  H01L21/8238 ,  H01L21/8247

Abstract: PURPOSE: To improve electric characteristics of a final device by reducing a masking process at the time of channel stopper formation by selectively implanting selected conductive ions in a substrate through a specific field insulating region after a semiconductor polysilicon material layer is formed on the substrate. CONSTITUTION: Immediately after a resist layer 5 has been removed, a thick field oxide region 10 is grown, a nitride layer 4 and an oxide layer 3 are removed, and a gate oxide layer 131 is grown. Then the implantation is carried out after a 1st polysilicon layer 14 has been adhered. Then a memory cell region, etc., of the 1st polysilicon layer is exposed by using a resist mask 20, the 1st polysilicon layer 14 on a field oxide region 10 formed on a P-type substrate 1 is exposed, and a channel stopper is formed below it. After the exposed part of the 1st polysilicon layer 14 has been removed, implantation is carried out with high energy to form a P+-type channel stopper 8'.

公开(公告)号：JPH05153294A

公开(公告)日：1993-06-18

申请号：JP12044992

申请日：1992-05-13

Applicant: ST MICROELECTRONICS SRL

Inventor： SILIGONI MARCO ,  SAVIOTTI VANNI

IPC: H02J1/00 ,  H04M19/00 ,  H04Q3/42

Abstract: PURPOSE: To provide the electronic interface circuit placed between a telephone subscriber line and a main exchange station that has advantages of a balanced circuit and an unbalanced circuit. CONSTITUTION: The interface circuit includes a feeding bridge circuit that connects a telephone subscriber line (LN) to a battery (UB) of an exchange station and a current limit circuit that limits a line current (IL) below a predetermined threshold level (ILIM), and when the line current (IL) is smaller than the threshold current (ILIM), a level at an output terminal of the feeding bridge circuit 3 is changed with a change in a load of the line (that is, the line current) in a balanced way, and when the line current (IL) is equal to the threshold current (ILIM), the current limit circuit is operated to limit the line current (IL) so as not to be increased more and the level of each output terminal of the feeding bridge circuit 3 is changed with a change in the line load in an unbalanced way.

公开(公告)号：JPH04274516A

公开(公告)日：1992-09-30

申请号：JP28772891

申请日：1991-11-01

Applicant: ST MICROELECTRONICS SRL

Inventor： DELL ORO ANNALISA ,  DELGROSSI GIOVANNI

IPC: G06F5/16 ,  G06F5/06 ,  G11C7/00

Abstract: PURPOSE: To provide a system constitution that can improve the performance concerning the storage capacity and also can reduce the entire scale of a circuit structure. CONSTITUTION: This system constitution is composed of a prescribed number of RAM 14, 15 and 16 which have the single access gates and the storage capacity equal to each part of total capacity that is needed for the system constitution. A control means 5 is added to the system constitution to control the accesses given to those RAMs and therefore to perform the read/write operations at a time or with time delays.

公开(公告)号：JPH0342866A

公开(公告)日：1991-02-25

申请号：JP15412190

申请日：1990-06-14

Applicant: ST MICROELECTRONICS SRL

Inventor： ZAMBRANO RAFFAELE ,  MUSUMECI SALVATORE ,  RACITI SALVATORE

IPC: H01L21/8222 ,  H01L21/8248 ,  H01L27/06

Abstract: PURPOSE: To improve the dynamic characteristics of a power stage by using a bipolar mode field-effect transistor(BMFET), to maximize the current handling capacity and robustness of the power stage. CONSTITUTION: An n -type epitaxial layer 2 is grown on an n-type substrate 1 made of a high-impurity concn. single crystal Si, a p -type region is formed to constitute a lateral separation region of a component of an integrated control circuit, and n -type region 4 acting as a buried collector layer of a transistor of this control circuit. At this time a new epitaxial layer extending over the entire chip region is grown to form an n-type region 5. A p -type regions 6, 7 are formed with an n -type regions 10, 11, formed as a source of a BMFET and as a collector sink to reduce the series resistance of a low-voltage transistor. A base and emitter regions 12, 13 of an npn low-voltage transistor are formed, and contacts are formed to interconnect elements of a semiconductor device by metallizing and photomasking.

公开(公告)号：JPH02219314A

公开(公告)日：1990-08-31

申请号：JP32747889

申请日：1989-12-19

Applicant: ST MICROELECTRONICS SRL

Inventor： NICOLLINI GERMANO

IPC: H03F3/00 ,  H03H19/00

Abstract: PURPOSE: To reduce an area, to reduce power consumption, and to improve a filtering ratio by providing a full differential arithmetic amplifier having two inputs and two outputs, and a pair of feedback circuit respectively having two capacitors and two switches. CONSTITUTION: Two outputs 6 of an arithmetic amplifier 1 are connected through a pair of feedback circuits 8 constituted of capacitors 10 selectively connected between the terminal of a polarization voltage Vp and the terminal of a reference voltage Vr according to the positions of a capacitor 9 and a pair of switches 11 with inputs 2. Then, when each switch 11 is connected with the capacitor 10 side, the capacitor 10 is properly charged with a voltage Vp -Vr and when each switch 11 is connected with the capacitor 9 side, the capacitor 10 is connected in parallel to the capacitor 9. Also, the amplifier 1 is formed of CMOS transistors Tr 13-16 in two systems, and the Tr 16 has a gate connected with each input 2, and an intermediate branch point between the Tr 14 and 15 is connected with each output 6. Thus, an area can be reduced, power consumption can be reduced, and a filtering ratio can be improved.

公开(公告)号：JP2009071314A

公开(公告)日：2009-04-02

申请号：JP2008261125

申请日：2008-09-08

Applicant: Politecnico Di Milano ,  St Microelectronics Srl ,  エッセティマイクロエレクトロニクス ソシエタ ア レスポンサビリタ リミタータ ,  ポリテクニコ ディ ミラノ

Inventor： REDAELLI ANDREA ,  PELLIZZER FABIO ,  PIROVANO AGOSTINO

IPC: H01L27/105 ,  H01L45/00

CPC classification number: H01L45/1233 ,  G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  H01L45/06 ,  H01L45/126 ,  H01L45/144

Abstract: PROBLEM TO BE SOLVED: To distinct different program states in an adequate time duration in multi-level programming.
SOLUTION: A phase change memory device 10 includes a heater element (2) and a memory region (3) of a chalcogenic material. The memory region has a phase change portion (5) contacted electrically and thermally with the heater element so that a first current path is formed between the heater element and the remaining portion (4) of the memory element. The phase change portion (5) has capacity in correlation with information stored in the memory region and resistivity larger than that of the remaining portion (4). A parallel current path (11) extends between the heater element (2) and the remaining portion (4) of the memory element and has resistivity depending on the largeness of the phase change portion (5) and smaller than that of the phase change portion (5) so that the whole resistance of the phase change memory device is adjusted.
COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：在多级编程中以足够的持续时间来区分不同的程序状态。 解决方案：相变存储器件10包括加热元件（2）和硫属材料的存储区域（3）。 存储区域具有与加热器元件电和热接触的相变部分（5），使得在加热器元件和存储元件的剩余部分（4）之间形成第一电流路径。 相变部分（5）具有与存储在存储区域中的信息相关的能力，并且电阻率大于剩余部分（4）的容量。 平行电流路径（11）在加热器元件（2）和存储元件的剩余部分（4）之间延伸，并且具有取决于相变部分（5）的大小的电阻率并且小于相变部分 （5），从而调整相变存储器件的整体电阻。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2007192826A

公开(公告)日：2007-08-02

申请号：JP2007010089

申请日：2007-01-19

Applicant: St Microelectronics Srl ,  エスティマイクロエレクトロニクス ソシエタ ア レスポンサビリタ リミタータ

Inventor： LASALANDRA ERNESTO ,  UNGARETTI TOMMASO

IPC: G01P15/125 ,  G01P15/18

CPC classification number: G11B19/043 ,  G01P15/0891 ,  G01P15/125 ,  G01P15/131 ,  G01P15/18 ,  G11B21/12

Abstract: PROBLEM TO BE SOLVED: To provide a free-fall detector device and free fall detection method. SOLUTION: A free-fall detector device comprises an inertial sensor (8), a detection circuit (21) combined with the inertial sensor (8), and a signal source (20) supplying a readout signal to the inertial sensor (8). The device is selectively connected to the detection circuit (21); has an accumulating element (30) which stores a feedback signal (V FBX ) generated from the detection circuit (21), responding to the readout signal which is supplied to the inertial sensor (8); and has feedback circuits (32a, 32b, 24, 36), which supply the feedback signal (V FBX ) to the inertial sensor (8) so as to generate at least one detection signal (V XO ), responding to the feedback signal (V FBX ) supplied to the inertial sensor (8) by the detection circuit (21), connecting to the accumulating element (30). COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供自由落体检测装置和自由落体检测方法。 解决方案：自由落体检测器装置包括惯性传感器（8），与惯性传感器（8）组合的检测电路（21）和向惯性传感器提供读出信号的信号源（20） 8）。 该装置选择性地连接到检测电路（21）; 具有存储从所述检测电路（21）产生的反馈信号（V SBX ）的累积元件（30），响应于提供给所述惯性传感器（8）的读出信号。 并具有向惯性传感器（8）提供反馈信号（V SBX ）的反馈电路（32a，32b，24,36），以产生至少一个检测信号（V ），连接到累积元件（30）。 版权所有（C）2007，JPO＆INPIT