公开(公告)号：US20170365507A1

公开(公告)日：2017-12-21

申请号：US15630597

申请日：2017-06-22

Applicant: Infineon Technologies AG

Inventor： Alfons Dehe ,  Damian Sojka ,  Andre Schmenn ,  Carsten Ahrens

IPC: H01L21/762 ,  H01L23/60 ,  H01L21/764 ,  H02H9/04 ,  H01L27/02 ,  H01L23/00

CPC classification number: H01L21/76289 ,  B81C1/00119 ,  B81C1/00214 ,  B81C1/00404 ,  B81C1/00484 ,  B81C1/00531 ,  B81C1/00539 ,  B81C1/00571 ,  B81C2201/0111 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2201/0135 ,  B81C2201/016 ,  B81C2201/0198 ,  B81C2201/053 ,  H01J1/3044 ,  H01J1/308 ,  H01J2201/30411 ,  H01J2201/3048 ,  H01L21/02129 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/283 ,  H01L21/31058 ,  H01L21/31105 ,  H01L21/31127 ,  H01L21/31144 ,  H01L21/764 ,  H01L23/60 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L27/0288 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/181 ,  H02H9/046 ,  H03K17/545 ,  H01L2924/00 ,  H01L2924/00012

Abstract: In one embodiment of the present invention, an electronic device includes a first emitter/collector region and a second emitter/collector region disposed in a substrate. The first emitter/collector region has a first edge/tip, and the second emitter/collector region has a second edge/tip. A gap separates the first edge/tip from the second edge/tip. The first emitter/collector region, the second emitter/collector region, and the gap form a field emission device.

公开(公告)号：US09821998B2

公开(公告)日：2017-11-21

申请号：US15187748

申请日：2016-06-20

Applicant: SiTime Corporation

Inventor： Pavan Gupta ,  Aaron Partridge ,  Markus Lutz

IPC: B81B7/00 ,  H01L23/34 ,  B81C1/00 ,  H01L23/498 ,  H01L23/31

CPC classification number: B81B7/0083 ,  B81B7/007 ,  B81B7/0077 ,  B81B2201/0271 ,  B81B2207/07 ,  B81B2207/094 ,  B81C1/0023 ,  B81C1/00301 ,  B81C1/00333 ,  B81C1/00341 ,  B81C2201/016 ,  B81C2203/0118 ,  B81C2203/0154 ,  H01L23/3107 ,  H01L23/34 ,  H01L23/498 ,  H01L2224/48091 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/01019 ,  H01L2924/10253 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: In a microelectromechanical system (MEMS) device, a CMOS die is affixed to a die-mounting surface and wire-bonded to electrically conductive leads, and a MEMS die is stacked on and electrically coupled to the CMOS die in a flip-chip configuration. A package enclosure envelopes the MEMS die, CMOS die and wire bonds, and exposes respective regions of the electrically conductive leads.

公开(公告)号：US20160276291A1

公开(公告)日：2016-09-22

申请号：US14844356

申请日：2015-09-03

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Keisuke NAKAZAWA

IPC: H01L23/00 ,  H01L23/31 ,  H01L21/02 ,  H01L23/29

CPC classification number: H01L23/562 ,  B81C1/0038 ,  B81C2201/016 ,  H01L21/02112 ,  H01L21/02164 ,  H01L21/02255 ,  H01L21/02282 ,  H01L23/291 ,  H01L23/295 ,  H01L23/296

Abstract: According to one embodiment, a semiconductor device includes: a semiconductor substrate; and an insulating film provided above the semiconductor substrate. The insulating film includes: a plurality of first particles having a periodic structure; a plurality of second particles provided between the plurality of first particles and having an average particle outline size smaller than an average particle outline size of the plurality of first particles; and a filler provided between at least one of the plurality of first particles and the plurality of second particles.

Abstract translation: 根据一个实施例，半导体器件包括：半导体衬底; 以及设置在半导体基板上方的绝缘膜。 绝缘膜包括：具有周期性结构的多个第一颗粒; 设置在所述多个第一粒子之间并具有比所述多个第一粒子的平均粒子轮廓尺寸小的平均粒子轮廓尺寸的多个第二粒子; 以及设置在所述多个第一颗粒中的至少一个与所述多个第二颗粒之间的填料。

公开(公告)号：US20160221819A1

公开(公告)日：2016-08-04

申请号：US14748012

申请日：2015-06-23

Applicant: InvenSense, Inc.

Inventor： Peter SMEYS ,  Jong Il SHIN ,  Jongwoo SHIN

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/0041 ,  B81B2207/012 ,  B81B2207/094 ,  B81C1/00293 ,  B81C2201/013 ,  B81C2201/0133 ,  B81C2201/016 ,  B81C2203/035 ,  B81C2203/0792

Abstract: A MEMS device is disclosed. The MEMS device includes a first substrate. At least one structure is formed within the first substrate. The first substrate includes at least one first conductive pad thereon. The MEMS device also includes a second substrate. The second substrate includes a passivation layer. The passivation layer includes a plurality of layers. A top layer of the plurality of layers comprises an outgassing barrier layer. At least one second conductive pad and at least one electrode are coupled to the top layer. At least one first conductive pad is coupled to the at least one second conductive pad.

Abstract translation: 公开了MEMS器件。 MEMS器件包括第一衬底。 在第一基板内形成至少一个结构。 第一衬底包括至少一个第一导电焊盘。 MEMS装置还包括第二基板。 第二基板包括钝化层。 钝化层包括多个层。 多个层的顶层包括除气阻挡层。 至少一个第二导电焊盘和至少一个电极耦合到顶层。 至少一个第一导电焊盘耦合到所述至少一个第二导电焊盘。

公开(公告)号：US20120326179A1

公开(公告)日：2012-12-27

申请号：US13526568

申请日：2012-06-19

Applicant: Takuo KAITOH ,  Takeshi KURIYAGAWA ,  Ryou SAKATA ,  Osamu KARIKOME ,  Timothy J. BROSNIHAN

Inventor： Takuo KAITOH ,  Takeshi KURIYAGAWA ,  Ryou SAKATA ,  Osamu KARIKOME ,  Timothy J. BROSNIHAN

IPC: H01L27/15 ,  H01L33/58

CPC classification number: G02B26/0841 ,  B81B7/007 ,  B81B2201/045 ,  B81C2201/0132 ,  B81C2201/016

Abstract: The MEMS shutter includes a shutter having an aperture part, a first spring connected to the shutter, a first anchor connected to the first spring, a second spring and a second anchor connected to the second spring, an insulation film on a surface of the shutter, the first spring, the second spring, the first anchor and the second anchor, the surfaces being in a perpendicular direction to a surface of a substrate, and the insulation film is not present on a surface of the plurality of terminals, and a surface of the shutter, the first spring, the second spring, the first anchor and the second anchor, the surfaces being in a parallel direction to a surface of the substrate and on the opposite side of the side facing the substrate.

Abstract translation: MEMS快门包括具有开口部分的快门，连接到快门的第一弹簧，连接到第一弹簧的第一锚杆，连接到第二弹簧的第二弹簧和第二锚固件，在挡板的表面上的绝缘膜 所述第一弹簧，所述第二弹簧，所述第一锚固件和所述第二锚固件，所述表面在垂直于基板表面的方向上，并且所述绝缘膜不存在于所述多个端子的表面上，并且所述表面 所述第一弹簧，所述第二弹簧，所述第一锚固件和所述第二锚固件，所述表面在与所述基板的表面平行的方向上以及在面向所述基板的所述一侧的相对侧上。

公开(公告)号：US20110183456A1

公开(公告)日：2011-07-28

申请号：US12691754

申请日：2010-01-22

Applicant: Tsung-Min Hsieh ,  Chien-Hsing Lee ,  Jhyy-Cheng Liou

Inventor： Tsung-Min Hsieh ,  Chien-Hsing Lee ,  Jhyy-Cheng Liou

IPC: H01L21/302

CPC classification number: B81C1/00246 ,  B81B2203/0315 ,  B81B2207/015 ,  B81C2201/016 ,  B81C2203/0714 ,  H04R19/005 ,  H04R19/04 ,  H04R31/00

Abstract: A method for fabricating MEMS device includes: providing a single crystal substrate, having first surface and second surface and having a MEMS region and an IC region; forming SCS mass blocks on the first surface in the MEMS region; forming a structural dielectric layer over the first surface of the substrate, wherein a dielectric member of the structural dielectric layer is filled in spaces surrounding the SCS mass blocks in the MEMS region, the IC region has a circuit structure with an interconnection structure formed in the structural dielectric layer; patterning the single crystal substrate by an etching process on the second surface to expose a portion of the dielectric member filled in the spaces surrounding the SCS mass blocks; performing isotropic etching process at least on the dielectric portion filled in the spaces surrounding the SCS mass blocks. The SCS mass blocks are exposed to release a MEMS structure.

Abstract translation: 一种制造MEMS器件的方法包括：提供具有第一表面和第二表面并具有MEMS区域和IC区域的单晶衬底; 在MEMS区域的第一表面上形成SCS质量块; 在所述基板的所述第一表面上形成结构介电层，其中所述结构介电层的电介质部件填充在所述MEMS区域中围绕所述SCS质量块的空间中，所述IC区域具有形成在所述MEMS区域中的互连结构的电路结构 结构介电层; 通过在第二表面上的蚀刻工艺对单晶衬底进行图案化，以暴露填充在围绕SCS质量块的空间中的电介质构件的一部分; 至少在填充在SCS质量块周围的空间中的电介质部分上进行各向同性蚀刻处理。 暴露SCS质量块以释放MEMS结构。

公开(公告)号：US07872333B2

公开(公告)日：2011-01-18

申请号：US10524610

申请日：2003-05-06

Applicant: Franz Laermer ,  Lutz Mueller ,  Winfried Bernhard

Inventor： Franz Laermer ,  Lutz Mueller ,  Winfried Bernhard

IPC: H01L23/58 ,  H01L21/70 ,  H01L29/06

CPC classification number: H01L21/02252 ,  B81B2203/033 ,  B81C1/00571 ,  B81C2201/016 ,  H01L21/02123 ,  H01L21/02238 ,  H01L21/02337 ,  H01L21/02343 ,  H01L21/02359 ,  H01L21/3121 ,  H01L21/31612 ,  Y10S438/958

Abstract: A layer system is described including a silicon layer and a passivation layer which is applied at least regionally to the silicon layer's surface, the passivation layer having a first, at least largely inorganic partial layer and a second partial layer, the second partial layer being made of an organic compound including silicon or containing such a material. In particular, the second partial layer is structured in the form of a “self-assembled monolayer.” Furthermore, a method is described for creating a passivation layer on a silicon layer, a first, inorganic partial layer being created on the silicon layer and a second partial layer, containing an organic compound including silicon or being made thereof, being created at least in certain areas on the first partial layer. Both partial layers form the passivation layer. The described layer system or the described method is particularly suited for creating self-supporting structures in silicon.

Abstract translation: 描述了一种层系统，其包括至少区域地施加到硅层表面的硅层和钝化层，钝化层具有第一至少大部分无机部分层和第二部分层，第二部分层被制成 包含硅或含有这种材料的有机化合物。 特别地，第二部分层以“自组装单层”的形式构成。此外，描述了一种在硅层上形成钝化层的方法，在硅层上形成第一无机部分层，以及 至少在第一部分层上的某些区域中产生含有包含硅或由其制成的有机化合物的第二部分层。 两个部分层形成钝化层。 所描述的层系统或所描述的方法特别适用于在硅中产生自支撑结构。

公开(公告)号：US07446382B2

公开(公告)日：2008-11-04

申请号：US10976928

申请日：2004-10-28

Applicant: Paul Winer ,  George P. Vakanas

Inventor： Paul Winer ,  George P. Vakanas

IPC: H01L27/14 ,  H01L29/82

CPC classification number: H01L21/00 ,  B01L3/5027 ,  B81B2201/058 ,  B81B2203/0338 ,  B81C1/00714 ,  B81C2201/016 ,  Y10S438/94 ,  Y10S438/958

Abstract: A method and apparatus for fabrication of passivated microfluidic structures is disclosed. The method includes providing a substrate having a microfluidic structure formed therein. The microfluidic structure is embedded by an embedding layer. The method further includes passivating the embedded microfluidic structure by locally heating the microfluidic structure surface in a reactive atmosphere, wherein the passivated microfluidic structure is suitable for transporting a fluid. The structure optionally further includes metal pads to form an electrokinetic pump.

Abstract translation: 公开了一种用于制造钝化微流体结构的方法和装置。 该方法包括提供其中形成有微流体结构的基底。 微流体结构由嵌入层嵌入。 该方法还包括通过在反应性气氛中局部加热微流体结构表面来钝化嵌入的微流体结构，其中钝化的微流体结构适于输送流体。 该结构任选地还包括金属垫以形成电动泵。

公开(公告)号：US07312553B2

公开(公告)日：2007-12-25

申请号：US10492896

申请日：2002-09-05

Applicant: Franz Laermer

Inventor： Franz Laermer

IPC: H01L41/08

CPC classification number: G01C19/5712 ,  B81B3/0086 ,  B81B2201/0242 ,  B81B2203/0136 ,  B81B2203/033 ,  B81C1/00801 ,  B81C2201/0104 ,  B81C2201/016

Abstract: A micromechanical component and a method for producing the component are provided. The micromechanical component includes a substrate and a micromechanical functional layer of a first material provided over the substrate. The functional layer has a first and second regions, which are connected by a third region of a second material, and at least one of the regions is part of a movable structure, which is suspended over the substrate.

Abstract translation: 提供微机械部件及其制造方法。 微机械部件包括衬底和设置在衬底上的第一材料的微机械功能层。 功能层具有通过第二材料的第三区域连接的第一和第二区域，并且至少一个区域是悬浮在基板上的可移动结构的一部分。

公开(公告)号：US06969628B2

公开(公告)日：2005-11-29

申请号：US10296771

申请日：2001-06-13

Applicant: Andreas Bertz ,  Thomas Gessner ,  Matthias Küchler ,  Roman Knöfler

Inventor： Andreas Bertz ,  Thomas Gessner ,  Matthias Küchler ,  Roman Knöfler

IPC: B81B3/00 ,  B81C1/00 ,  H01L21/00

CPC classification number: B81B3/0086 ,  B81B2203/033 ,  B81C2201/016

Abstract: The invention relates to a microstructure in a preferably electrically conductive substrate (1), more specifically made of doped single crystal silicon, with at least one functional unit (2.1, 2.2) and to a method of fabricating the same. In accordance with the invention, the functional unit (2.1, 2.2) is mechanically and electrically separated from the substrate (1) on all sides by means of isolation gaps (5, 5a) and is connected, on at least one site, to a first structure (4a) of an electrically conductive layer (S) that is electrically isolated from the substrate (1) by way of an isolation layer (3) and that secures the unit into position relative to the substrate (1). For this purpose, the functional unit (2.1, 2.2) is released from the substrate (1) in such a manner that the isolation gaps (5, 5a) are provided on all sides relative to the substrate (1). The electrically conductive layer (S) is applied in such a manner that it is connected through contact fingers (4a) for example to the functional unit (2.1, 2.2) which it secures into position. The method in accordance with the invention permits to substantially facilitate the manufacturing process and to produce a microstructure with but small parasitic capacitances.

Abstract translation: 本发明涉及在具有至少一个功能单元（2.1,2.2）的优选导电衬底（1）中，更具体地由掺杂单晶硅制成的微观结构及其制造方法。 根据本发明，通过隔离间隙（5,5a），功能单元（2.1,2.2）在所有侧面上与基板​​（1）机械地和电气地分开，并且在至少一个位置连接到 通过隔离层（3）与衬底（1）电绝缘的导电层（S）的第一结构（4a），并且将单元固定在相对于衬底（1）的位置。 为此，功能单元（2.1,2.2）以这样的方式从基板（1）释放，使得隔离间隙（5,5a）相对于基板（1）设置在所有侧面上。 导电层（S）以这样的方式被施加，使得它通过接触指状物（4a）例如连接到功能单元（2.1,2.2）上，其被固定到位。 根据本发明的方法允许基本上方便制造过程并产生具有小的寄生电容的微结构。