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公开(公告)号：KR20210033842A
公开(公告)日：2021-03-29
申请号：KR1020190115645A
申请日：2019-09-19
Applicant: 삼성전자주식회사
IPC: H04W52/28 , H04B1/3827 , H04W52/24 , H04W88/02
CPC classification number: H04W52/28 , H04B1/3838 , H04W52/245 , H04W88/02
Abstract: 본 발명의 다양한 실시예는 전자 장치가 송신 전력을 제어하는 방법에 관한 것으로, 상기 방법은, 안테나를 통해 외부 장치와 무선 통신하는 동안에 그립 센서를 이용해 인체의 근접을 감지하는 동작, 상기 인체의 근접을 감지하면, 상기 안테나를 이용하여 지정된 영역과 기준 거리 이내에 상기 인체가 근접한 상태인지 결정하는 동작, 상기 지정된 영역과 기준 거리 이내에 상기 인체가 근접한 상태가 아니면 제 1 제어 정보에 기반하여 상기 안테나를 통해 송신되는 신호의 전력을 낮추는 동작, 및 상기 지정된 영역과 기준 거리 이내에 상기 인체가 근접한 상태이면 제 2 제어 정보에 기반하여 상기 신호의 전력을 낮추는 동작을 포함하고, 상기 제 2 제어 정보는 상기 제 1 제어 정보와는 다를 수 있다. 본 발명은 그 밖에 다양한 실시예를 더 포함할 수 있다.
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公开(公告)号：KR1020100063937A
公开(公告)日：2010-06-14
申请号：KR1020080122316
申请日：2008-12-04
Applicant: 삼성전자주식회사
IPC: H01L27/115 , H01L21/8247
CPC classification number: H01L27/2436 , H01L27/2409 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1625 , H01L45/1683 , H01L45/143
Abstract: PURPOSE: A phase change memory unit, a forming method thereof, and a method for manufacturing a phase change memory device are provided to improve the electric property of the phase change memory device by reducing the intensity of a current for changing the crystal structure of a phase change material layer. CONSTITUTION: A lower electrode is formed on a substrate. An insulation structure exposes the lower electrode and includes an opening which becomes narrower from the upper side to the lower side. A phase change material layer pattern(140) partially covers the upper side of the insulation structure while filling the opening. An upper electrode(150) is formed on the phase change material layer pattern.
Abstract translation: 目的：提供一种相变存储器单元，其形成方法和相变存储器件的制造方法，用于通过降低用于改变相变存储器件的晶体结构的电流的强度来改善相变存储器件的电性能 相变材料层。 构成：在基板上形成下电极。 绝缘结构暴露下电极并且包括从上侧到下侧变窄的开口。 相变材料层图案（140）在填充开口时部分地覆盖绝缘结构的上侧。 在相变材料层图案上形成上电极（150）。
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公开(公告)号：KR1020120137860A
公开(公告)日：2012-12-24
申请号：KR1020110056992
申请日：2011-06-13
Applicant: 삼성전자주식회사
Inventor： 강명진
IPC: H01L21/8247 , H01L27/115
CPC classification number: H01L45/1683 , H01L27/2409 , H01L27/2436 , H01L27/2445 , H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144 , H01L45/16 , H01L45/1608 , H01L45/04
Abstract: PURPOSE: A manufacturing method for variable resistance memory device is provided to simplify a patterning process by forming variable resistance patterns using a self-aligned method by replacing sacrificial patterns with variable resistance patterns. CONSTITUTION: Conductive patterns and first insulating patterns are formed on a substrate. Preliminary sacrificial patterns are formed on the conductive patterns. Preliminary bottom electrodes are formed by etching the preliminary sacrificial patterns using the conductive patterns as an etching mask. The sacrificial patterns and bottom electrodes(BE) are formed by patterning the preliminary sacrificial patterns and the preliminary bottom electrodes. The sacrificial patterns are replaced by variable resistance patterns(145).
Abstract translation: 目的：提供可变电阻存储器件的制造方法，通过用可变电阻图案代替牺牲图案，通过使用自对准方法形成可变电阻图案来简化图案化工艺。 构成：在基板上形成导电图案和第一绝缘图案。 在导电图案上形成初步牺牲图案。 通过使用导电图案作为蚀刻掩模蚀刻预备牺牲图案来形成初步底部电极。 牺牲图案和底部电极（BE）通过图案化初步牺牲图案和预备底部电极而形成。 牺牲图案由可变电阻图案（145）代替。
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公开(公告)号：KR1020110118356A
公开(公告)日：2011-10-31
申请号：KR1020100037911
申请日：2010-04-23
Applicant: 삼성전자주식회사
IPC: H01L21/8247 , H01L27/115
CPC classification number: H01L27/2409 , H01L45/06 , H01L45/1233 , H01L45/1273 , H01L45/1683 , H01L45/04 , H01L21/31051 , H01L27/2454
Abstract: 가변 저항 메모리 소자 및 그 제조 방법을 제공한다. 셀 영역 및 주변 영역을 포함하는 기판을 준비하고, 상기 주변 영역에 주변 트랜지스터를 형성하고, 상기 주변 트랜지스터 및 상기 기판을 덮는 층간 절연막을 형성하고, 상기 층간 절연막을 패터닝하여 상기 셀 영역에 리세스 영역을 형성하고, 상기 리세스 영역 및 상기 층간 절연막 상에 가변 저항 물질막을 형성하고, 상기 주변 영역의 상기 가변 저항 물질막을 제거하고, 평탄화 공정에 의하여 가변 저항 물질 패턴을 형성한다.
Abstract translation: 形成可变电阻存储器件的方法包括图案化层间电介质层以限定其中可露出可变电阻存储单元的底部电极的开口，在衬底（例如，半导体衬底）的存储单元区域上。 这些方法还包括在开口中的暴露的底部电极上沉积可变电阻材料层（例如，相变材料），并且延伸到与衬底的外围电路区域相对延伸的层间电介质层的第一部分上。 然后依次选择性地蚀刻可变电阻材料层和层间电介质层的第一部分，以在层间介质层中限定凹陷。 然后将可变电阻材料层和层间电介质层平坦化，以在开口内限定可变电阻图案。
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Patent Agency Ranking
公开(公告)号：KR100953960B1
公开(公告)日：2010-04-21
申请号：KR1020080029249
申请日：2008-03-28
Applicant: 삼성전자주식회사
IPC: H01L21/28
CPC classification number: H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1666
Abstract: A contact structure that includes a first pattern formed on a substrate, wherein the first pattern has a recessed region in an upper surface thereof, a planarized buffer pattern formed on the first pattern, and a conductive pattern formed on the planarized buffer pattern.
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公开(公告)号：KR1020090103609A
公开(公告)日：2009-10-01
申请号：KR1020080029324
申请日：2008-03-28
Applicant: 삼성전자주식회사
IPC: H01L27/115 , H01L21/8247
CPC classification number: H01L45/06 , H01L21/76229 , H01L45/1233 , H01L45/143 , H01L45/144
Abstract: PURPOSE: A phase change memory device and a manufacturing method thereof are provided to prevent damage due to etching of a phase change material layer. CONSTITUTION: A first electrode(410) is formed inside a first insulation layer(400) formed on a semiconductor substrate(100), and penetrates the first insulation layer. A plurality of trenches is extended into a first direction in order to expose the first electrode. A mold insulation layer having the trenches is formed on the first insulation layer. A phase change material layer(600) is formed on the mold insulation layer, is filled in the trenches, and is commonly connected with the first electrode. A second electrode line pattern(700) is formed on the phase change material layer, and is extended into a second direction different from the first direction.
Abstract translation: 目的：提供一种相变存储器件及其制造方法，以防止相变材料层的蚀刻造成的损伤。 构成：第一电极（410）形成在形成在半导体衬底（100）上的第一绝缘层（400）内，并穿透第一绝缘层。 为了露出第一电极，多个沟槽延伸到第一方向。 具有沟槽的模具绝缘层形成在第一绝缘层上。 在模具绝缘层上形成相变材料层（600），填充在沟槽中，并与第一电极共同连接。 第二电极线图案（700）形成在相变材料层上，并且延伸到与第一方向不同的第二方向。
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公开(公告)号：KR1020110024101A
公开(公告)日：2011-03-09
申请号：KR1020090081976
申请日：2009-09-01
Applicant: 삼성전자주식회사 , 오보닉스, 아이엔씨.
IPC: H01L21/8247 , H01L27/115
CPC classification number: H01L45/141 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/124 , H01L45/144 , H01L45/143
Abstract: PURPOSE: A nonvolatile memory device including a phase change material is provided to operate at a low voltage by forming a memory layer with a low reset current. CONSTITUTION: A nonvolatile memory device includes a bottom electrode(140), a phase change material layer(160), and a top electrode(170). The phase change material layer is electrically connected to the bottom electrode and includes a phase change material of Inx Sby Tez. Wherein, 0.001
Abstract translation: 目的：通过形成具有低复位电流的存储层，提供包括相变材料的非易失性存储器件以在低电压下工作。 构成：非易失性存储器件包括底部电极（140），相变材料层（160）和顶部电极（170）。 相变材料层电连接到底部电极并且包括Inx Sby Tez的相变材料。 其中0.001 <= x <=0.3,0.001≤y≤0.8,0.001≤z≤0.7，x + y + z = 1。 顶部电极电连接到相变材料层。
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公开(公告)号：KR1020100070155A
公开(公告)日：2010-06-25
申请号：KR1020080128769
申请日：2008-12-17
Applicant: 삼성전자주식회사
IPC: H01L21/8247 , H01L27/115
CPC classification number: H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144 , H01L45/1666 , H01L45/1683
Abstract: PURPOSE: A method for manufacturing a phase transition memory device with a multiple electrode layer is provided to minimize the heat from the interface between a lower electrode and a phase transition pattern to the peripheral region by forming a lower electrode made of the multiple layer. CONSTITUTION: An interlayer insulation layer(1200), a mold(115) and a preliminary electrode are formed on a substrate(1010). The interlayer insulation layer and the mold face each other. The preliminary electrode is positioned between the interlayer insulation layer and the mold. A first electrode(110) is formed by etching the preliminary electrode and then a gap is formed between the first insulation layer and the mold. A second electrode(120) is formed to fill the gap. The phase transition pattern is formed on the second electrode.
Abstract translation: 目的：提供一种用于制造具有多电极层的相变存储器件的方法，用于通过形成由多层制成的下电极来使从下电极和相转变图案之间的界面到外围区域的热量最小化。 构成：在基板（1010）上形成层间绝缘层（1200），模具（115）和预备电极。 层间绝缘层和模具相互面对。 预备电极位于层间绝缘层和模具之间。 通过蚀刻预备电极形成第一电极（110），然后在第一绝缘层和模具之间形成间隙。 形成第二电极（120）以填充间隙。 在第二电极上形成相变图案。
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10.发明公开상변화 메모리 유닛, 이의 제조 방법, 이를 포함하는상변화 메모리 장치 및 그 제조 방법 无效相变存储器单元，形成相变存储单元的方法，具有相变存储器单元的相变存储器件以及制造相变存储器件的方法
公开(公告)号：KR1020090020938A
公开(公告)日：2009-02-27
申请号：KR1020070085582
申请日：2007-08-24
Applicant: 삼성전자주식회사
IPC: H01L27/115 , H01L21/8247
CPC classification number: H01L45/1625 , G11C13/0004 , H01L27/2409 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144 , H01L45/1675 , H01L45/1691
Abstract: A phase-change memory unit, a manufacturing method thereof, a phase-change memory device having the same and a manufacturing method of a phase-change memory device are provided to reduce amount of metallic component diffused to a phase change material layer pattern by forming a transition metal film pattern between a phase change material layer and an upper electrode. A bottom electrode(120) is formed on the substrate. A phase change material layer pattern(152) is formed on the bottom electrode. The phase change material layer pattern comprises carbon and GST compound. A first transition metal film pattern(162) is formed on the phase change material layer pattern. An upper electrode(172) is formed on the first transition metal film pattern. The first transition metal film pattern comprises one or more selected from the group consisting of titanium(Ti), vanadium(V), chrome(Cr), manganese(Mn), iron(Fe), cobalt(Co), nickel(Ni), zirconium(Zr), niobium(Nb), molybdenum(Mo), ruthenium(Ru), rhodium(Rh), palladium(Pd), hafnium(Hf), tantalum(Ta), tungsten(W), rhenium(Re), osmium(Os), iridium(Ir) and platinum(Pt).
Abstract translation: 相变存储器单元，其制造方法，具有该相变存储器件的相变存储器件和相变存储器件的制造方法被提供以通过形成来减少扩散到相变材料层图案的金属成分的量 相变材料层和上部电极之间的过渡金属膜图案。 在基板上形成底部电极（120）。 在底部电极上形成相变材料层图案（152）。 相变材料层图案包括碳和GST化合物。 在相变材料层图案上形成第一过渡金属膜图案（162）。 在第一过渡金属膜图案上形成上电极（172）。 第一过渡金属膜图案包括选自钛（Ti），钒（V），铬（Cr），锰（Mn），铁（Fe），钴（Co），镍（Ni） ，锆（Zr），铌（Nb），钼（Mo），钌（Ru），铑（Rh），钯（Pd），铪（Hf） ，锇（Os），铱（Ir）和铂（Pt）。
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