-
公开(公告)号：KR1020080058795A
公开(公告)日：2008-06-26
申请号：KR1020060132898
申请日：2006-12-22
Applicant: 삼성전자주식회사
IPC: G02F1/1335 , G02F1/13357
CPC classification number: G02F1/133615 , F21Y2115/10 , G02B6/0083 , G02F1/133524 , Y10S362/80
Abstract: A backlight unit and an LCD(Liquid Crystal Display) using the same are provided to form an LED(Light Emitting Diode) mounting unit to a sidewall of a mold frame and to mount an LED to the LED mounting unit, thereby performing a re-work process easily. A mold frame(200) supports a light guide panel(400). A penetration hole is formed at a sidewall of the mold frame toward the length direction of the light guide panel. At a portion of an LED unit(300) is inserted into the penetration hole and the LED unit is located at the side of the light guide panel. The LED unit includes an LED diode and a substrate for mounting the LED diode. The LED diode includes a top-shape LED or a side-view shape LED. In the top-shape LED, the light beam emitted from the light transmission surface is located vertically to the substrate. The top-shape LED is mounted to a penetration hole. The substrate is located in parallel to a sidewall from the outside of the sidewall.
Abstract translation: 提供使用其的背光单元和LCD（液晶显示器），以在模具框架的侧壁上形成LED（发光二极管）安装单元，并将LED安装到LED安装单元， 工作流程容易。 模具框架（200）支撑导光板（400）。 在模架的侧壁朝向导光板的长度方向形成贯通孔。 在LED单元（300）的一部分插入穿透孔中，并且LED单元位于导光板的侧面。 LED单元包括LED二极管和用于安装LED二极管的基板。 LED二极管包括顶部形状的LED或侧视形状的LED。 在顶部形状的LED中，从透光表面发射的光束垂直于基板。 顶部形状的LED被安装到穿透孔。 衬底从侧壁的外侧平行于侧壁定位。
-
公开(公告)号：KR1020080021949A
公开(公告)日：2008-03-10
申请号：KR1020060085209
申请日：2006-09-05
Applicant: 삼성전자주식회사
CPC classification number: G06F3/0202 , G06F3/0482 , H03K2217/9651
Abstract: An electronic device and a signal inputting method using the same are provided to enable a user to input a desired signal to a portable electronic device with simple manipulation and select again a desired object by moving a menu selection section with the manipulation of an input button through one touch. An electronic device includes a main unit(50), a screen display unit(10) performing an output function by connecting to the main unit, and an input button(30) for inputting a signal to the main unit. The input button includes a pressing part(31) receiving external force, an elastic member(32) changing pressure depending on the received external force, and a detector(33) detecting pressure change of the elastic member. The screen display unit displays a plurality of selection objects and a menu selection section appointing the current object selected among the selection objects in a menu selection mode. The menu selection section is moved to one direction when the detected pressure is increased, and is moved to another direction when the detected pressure is decreased. The menu selection section is fixed when the pressure higher than a predetermined level is detected.
Abstract translation: 提供一种电子设备和使用该设备的信号输入方法，以使用户能够以简单的操作将便携式电子设备输入所需信号，并通过在输入按钮的操纵下移动菜单选择部分再次选择期望的对象 一碰。 电子设备包括主单元（50），通过连接到主单元执行输出功能的屏幕显示单元（10）和用于向主单元输入信号的输入按钮（30）。 输入按钮包括受到外力的按压部（31），根据接收到的外力而改变压力的弹性部件（32），以及检测弹性部件的压力变化的检测器（33）。 屏幕显示单元在菜单选择模式中显示多个选择对象和指定在选择对象中选择的当前对象的菜单选择部。 当检测到的压力增加时，菜单选择部分被移动到一个方向，并且当检测到的压力降低时，菜单选择部分被移动到另一个方向。 当检测到高于预定水平的压力时，菜单选择部分是固定的。
-
公开(公告)号：KR1020060118078A
公开(公告)日：2006-11-23
申请号：KR1020050040538
申请日：2005-05-16
Applicant: 삼성전자주식회사
CPC classification number: H01L21/76897 , H01L21/76859 , H01L21/76889 , H01L27/1104
Abstract: A method for manufacturing a stack type semiconductor device is provided to restrain the erosion of a single crystal silicon pattern by forming uniformly a metal silicide layer using a nitrogen doped region. A first interlayer dielectric(102a), a single crystal silicon pattern(108a) and a second interlayer dielectric(110a) are sequentially formed on a single crystal silicon substrate(100). The single crystal silicon layer is used as an upper active region. A contact hole for exposing an upper portion of the single crystal silicon substrate and sidewalls of the single crystal silicon pattern to the outside is formed on the resultant structure by etching. A nitrogen doped region(118) is formed at the exposed sidewalls of the single crystal silicon pattern by using a nitrogen ion implantation. A barrier metal is formed along an upper surface of the resultant structure. A heat treatment is performed on the resultant structure to form a lower metal silicide layer on the exposed single crystal silicon substrate and a side silicide layer on the sidewalls of the single crystal silicon pattern.
Abstract translation: 提供一种堆叠型半导体器件的制造方法，通过使用氮掺杂区域均匀地形成金属硅化物层来抑制单晶硅图案的侵蚀。 在单晶硅衬底（100）上依次形成第一层间电介质（102a），单晶硅图案（108a）和第二层间电介质（110a）。 单晶硅层用作上活性区。 通过蚀刻在所得结构上形成用于将单晶硅衬底的上部和单晶硅图案的侧壁暴露于外部的接触孔。 通过使用氮离子注入在单晶硅图案的暴露的侧壁处形成氮掺杂区域（118）。 沿所得结构的上表面形成阻挡金属。 对所得结构进行热处理，以在暴露的单晶硅衬底上形成下金属硅化物层，并在单晶硅图案的侧壁上形成侧硅化物层。
-
公开(公告)号：KR1020150119567A
公开(公告)日：2015-10-26
申请号：KR1020140044928
申请日：2014-04-15
Applicant: 삼성전자주식회사
IPC: H01L29/78 , H01L21/335
CPC classification number: H01L21/28273 , H01L27/11521 , H01L29/42336 , H01L29/66825 , H01L29/7845 , H01L29/7812
Abstract: 반도체소자및 그제조방법이제공된다. 본발명에따른반도체소자의제조방법은기판상에오프닝을갖는층간절연막을형성하는것; 상기오프닝의바닥면및 측벽상에, 제1 도전패턴, 배리어패턴, 및제2 도전패턴을차례로형성하는것; 및상기제2 도전패턴의상부를질화시켜, 상기금속질화막을형성하되, 상기금속질화막은상기제1 도전패턴과이격되는것을포함할수 있다.
Abstract translation: 提供半导体器件及其制造方法。 根据本发明的半导体器件的制造方法包括以下步骤：在衬底上形成具有开口的层间电介质层; 在开口的侧壁和底部依次形成第一导电图案，阻挡图案和第二导电图案; 以及通过硝化第二导电图案的上侧而形成金属氮化物层。 金属氮化物层与第一导电图案分离。
-
公开(公告)号：KR1020150000267A
公开(公告)日：2015-01-02
申请号：KR1020130072504
申请日：2013-06-24
Applicant: 삼성전자주식회사
IPC: H01L29/78 , H01L21/336
CPC classification number: H01L27/0886 , H01L21/823821 , H01L21/845 , H01L27/0924 , H01L27/1211 , H01L29/165 , H01L29/4966 , H01L29/517 , H01L29/66545 , H01L29/42356 , H01L21/76831 , H01L29/7802
Abstract: 반도체 소자가 제공된다. 반도체 소자는, 제1 영역과 제2 영역을 포함하는 기판 및 상기 제1 영역 상에 형성된 제1 폭의 제1 게이트 전극 및 상기 제2 영역 상에 형성된 상기 제1 폭과 다른 제2폭의 제2 게이트 전극을 포함하되, 상기 제1 게이트 전극은, 상기 제1 영역 상에 형성된 제1 트렌치를 포함하는 제1 게이트 절연막과, 상기 제1 게이트 전극의 일함수를 조절하고, 상기 제1 절연막 상에 상기 제1 트렌치를 채우도록 형성된 제1 기능막을 포함하고, 상기 제2 게이트 전극은, 상기 제2 영역 상에 각각 형성된 제2 트렌치를 포함하는 제2 게이트 절연막과, 상기 제2 게이트 전극의 일함수를 조절하며, 상기 제2 절연막 상에 형성되고 상기 제2 트렌치보다 작은 제3 트렌치를 포함하는 제2 기능막과, 상기 제3 트렌치를 채우도록 형성된 게이트 메탈을 포함한다.
Abstract translation: 本发明提供能够提高栅极性能的半导体器件。 根据本发明的半导体器件包括：衬底，其包括第一区域和第二区域，形成在第一区域上的第一宽度的第一栅极电极和形成在第二区域上的第二宽度的第二栅极电极， 第二个地区。 其中，第二宽度与第一宽度不同。 第一栅极包括第一栅极绝缘层，其包括形成在第一区域上的第一沟槽和控制第一栅电极的功函数并形成在第一绝缘层上以填充第一沟槽的第一功能层 。 第二栅电极包括第二栅极绝缘层，其包括形成在第二区域上的第二沟槽，第二功能层，其控制第二栅电极的功函数，并且包括形成在第二绝缘层上的第三沟槽 并且小于第二沟槽，以及填充第三沟槽的栅极金属部分。
-
Patent Agency Ranking
公开(公告)号：KR1020120125017A
公开(公告)日：2012-11-14
申请号：KR1020110043039
申请日：2011-05-06
Applicant: 삼성전자주식회사
IPC: H01L29/78 , H01L21/336
CPC classification number: H01L27/0886 , H01L21/823431 , H01L21/823821 , H01L29/66795 , H01L29/785
Abstract: PURPOSE: A semiconductor device and a manufacturing method thereof are provided to improve channel driving performance by reducing the length of a channel of a field effect transistor. CONSTITUTION: First and second active pins(101,102) are formed into one body with a substrate. The first and second active pins are perpendicularly protruded from the substrate. A gate insulating layer(120) is formed on the first and second active pins. A first gate metal(130) is formed while contacting the gate insulating layer. A second gate metal(140) contacts the first gate metal of formed on the first active pin. The first gate metal and the second gate metal comprise different material.
Abstract translation: 目的：提供半导体器件及其制造方法，以通过减小场效应晶体管的沟道的长度来改善沟道驱动性能。 构成：第一和第二有源引脚（101,102）与衬底形成一体。 第一和第二有源引脚从基板垂直突出。 栅极绝缘层（120）形成在第一和第二有源引脚上。 在与栅极绝缘层接触的同时形成第一栅极金属（130）。 第二栅极金属（140）接触形成在第一有源引脚上的第一栅极金属。 第一栅极金属和第二栅极金属包括不同的材料。
-
公开(公告)号：KR1020080062208A
公开(公告)日：2008-07-03
申请号：KR1020060137697
申请日：2006-12-29
Applicant: 삼성전자주식회사
Inventor： 김재중
IPC: H04B1/38
CPC classification number: H04M1/23 , H04M1/72583 , H04M2250/12
Abstract: A multifunction button for a display device is provided to realize various functions with the one multifunction button, and to carry out an operation method of the multifunction button easily, thereby omitting plural buttons when applied to a portable display device. A button unit(110) is compressed and rotated according to pressure applied from the outside. A controller(130) senses internal pressure of the button unit by being disposed on a lower side of the button unit, and outputs a control signal for changing, maintaining, or selecting a location of a selection bar for a menu according to increasing/decreasing speed of the internal pressure. A substrate(150) is mounted with the controller, and delivers the control signal to a driver of a portable display device which drives a display screen.
Abstract translation: 提供了一种用于显示装置的多功能按钮以通过一个多功能按钮实现各种功能，并且容易地执行多功能按钮的操作方法，从而当应用于便携式显示装置时省略了多个按钮。 按钮单元（110）根据从外部施加的压力被压缩和旋转。 控制器（130）通过设置在按钮单元的下侧来检测按钮单元的内部压力，并且根据增加/减少输出用于改变，维护或选择菜单的选择条的位置的控制信号 内部压力的速度。 基板（150）安装有控制器，并且将控制信号传送到驱动显示屏的便携式显示装置的驱动器。
-
公开(公告)号：KR1020060123806A
公开(公告)日：2006-12-05
申请号：KR1020050045381
申请日：2005-05-30
Applicant: 삼성전자주식회사
IPC: H01L21/283
CPC classification number: H01L21/76846 , H01L21/28518 , H01L21/76853 , H01L21/76877
Abstract: A method for manufacturing a stacked semiconductor device is provided to reduce erosion of a single crystalline silicon layer pattern by forming differently a lower metal silicide layer and a lateral metal silicide layer in the thickness. A plurality of interlayer dielectrics are formed on a single crystalline silicon substrate(100). A single crystalline silicon layer pattern(108a) is formed between the interlayer dielectrics. A contact hole for exposing a sidewall of the single crystalline silicon layer pattern and a part of the single crystalline silicon substrate is formed by etching sequentially the interlayer dielectrics. A first metal silicide layer(142) having a first thickness is formed on the exposed single crystalline silicon substrate. A second metal silicide layer(144) thinner than the first metal silicide layer is formed on a sidewall of the single crystalline silicon layer.
Abstract translation: 提供一种用于制造堆叠半导体器件的方法，以通过不同地形成厚度的下金属硅化物层和侧金属硅化物层来减少单晶硅层图案的侵蚀。 在单晶硅衬底（100）上形成多个层间电介质。 在层间电介质之间形成单晶硅层图案（108a）。 通过依次蚀刻层间电介质来形成用于暴露单晶硅层图案的侧壁和单晶硅衬底的一部分的接触孔。 在暴露的单晶硅衬底上形成具有第一厚度的第一金属硅化物层（142）。 在单晶硅层的侧壁上形成比第一金属硅化物层薄的第二金属硅化物层（144）。
-
公开(公告)号：KR1020060056520A
公开(公告)日：2006-05-25
申请号：KR1020040095637
申请日：2004-11-22
Applicant: 삼성전자주식회사
IPC: H01L27/108
CPC classification number: H01L28/91 , H01L27/10855 , H01L28/75
Abstract: 하부의 콘택 패드의 손상이 감소되는 커패시터 제조 방법으로, 우선 기판 상에 콘택 패드를 포함하는 층간 절연막을 형성한다. 상기 콘택 패드 상에 케미컬 침투를 억제시키기 위한 보상 전극막 패턴을 형성한다. 상기 보상 전극막 패턴 상에 실린더형의 하부 전극을 형성한다. 다음에, 상기 하부 전극 상에 유전막 및 상부 전극을 형성함으로서 커패시터를 완성한다. 상기와 같이, 보상 전극막 패턴을 형성함으로서 케미컬 침투에 의한 하부의 콘택 패드의 손상을 최소화할 수 있다.
-
-
-
-
-
-
-
-
-
Search Results
11
records
(took 0.025 seconds)
