액정표시장치 및 그 제어방법
    2.
    发明公开
    액정표시장치 및 그 제어방법 无效
    液晶显示及其控制方法

    公开(公告)号:KR1020060116069A

    公开(公告)日:2006-11-14

    申请号:KR1020050038424

    申请日:2005-05-09

    Inventor: 김형희

    CPC classification number: G09G3/3696 G09G2320/0673

    Abstract: A liquid crystal display and a control method thereof are provided to easily generate gamma voltage by using a chip capable of regulating the output value according to the external control signal and to control the gamma voltage regardless of the kind and size of a liquid crystal panel. A liquid crystal display includes a gamma voltage generating unit(400) having a variable resistance unit for outputting a plurality of resistance values according to a resistance control signal and a digital variable resistance chip for generating a plurality of gamma voltages by distributing reference voltage with the resistance values and a data driver(500) for applying data voltage to a liquid crystal panel(100) by using the gamma voltages generated.

    Abstract translation: 提供了一种液晶显示器及其控制方法,通过使用能够根据外部控制信号调节输出值的芯片来容易地产生伽马电压,并且与液晶面板的种类和尺寸无关地控制伽马电压。 液晶显示器包括:伽马电压发生单元,具有可变电阻单元,用于根据电阻控制信号输出多个电阻值;以及数字可变电阻芯片,用于通过分配参考电压产生多个伽马电压 电阻值和用于通过使用所产生的伽马电压将数据电压施加到液晶面板(100)的数据驱动器(500)。

    반도체 소자의 미세 패턴 형성 방법
    3.
    发明授权
    반도체 소자의 미세 패턴 형성 방법 有权
    形成半导体器件精细图案的方法

    公开(公告)号:KR101573464B1

    公开(公告)日:2015-12-02

    申请号:KR1020090068978

    申请日:2009-07-28

    Abstract: 반도체소자의미세패턴형성방법이제공된다. 이미세패턴형성방법은기판상에기판의표면과평행한방향을따라제 1 거리로서로이격되어있는복수의예비제 1 마스크패턴들을형성하는것, 복수의예비제 1 마스크패턴들을덮도록기판상에산 용액층을형성하는것, 산용액층내의산 소스로부터얻어지는산을복수의예비제 1 마스크패턴들의내부로확산시켜, 복수의예비제 1 마스크패턴들각각의상부및 측부들을용해제에대해제 1 용해도를갖는산 확산영역들로전환하여제 1 거리보다큰 제 2 거리로서로이격되면서산 확산영역들각각에의해상부및 측부들이둘러싸인복수의제 1 마스크패턴들을형성하는것, 산용액층을제거하여제 1 산확산영역들을노출하는것, 용해제에대해제 1 용해도보다낮은제 2 용해도를갖는제 2 마스크층을산 확산영역들사이의공간들내에형성하는것 및용해제로산 확산영역들을제거하여복수의제 1 마스크패턴들사이에개별적으로위치하는복수의제 2 마스크패턴들을형성하는것을포함한다.

    반도체 소자의 제조 방법

    公开(公告)号:KR1020110109561A

    公开(公告)日:2011-10-06

    申请号:KR1020100029346

    申请日:2010-03-31

    Abstract: 본 발명의 반도체 소자의 제조 방법에서는 산에 의해 탈보호될 수 있는 보호기를 가지는 폴리머를 포함하는 재료를 사용하여 기판상에 홀이 형성된 제1 마스크 패턴을 형성한다. 제1 마스크 패턴의 노출 표면에 산 소스를 포함하는 캡핑층을 형성한다. 캡핑층 내에 있는 산 소스를 제1 마스크 패턴 내부에 확산시킨다. 캡핑층을 사이에 두고 제1 마스크 패턴과 이격된 상태로 홀 내부를 채우는 제2 마스크층을 형성한다. 캡핑층 및 제1 마스크 패턴을 제거한다. 홀 내부에 있던 제2 마스크층으로 이루어지는 제2 마스크 패턴을 형성한다.

    반도체 소자의 미세 패턴 형성 방법
    5.
    发明公开
    반도체 소자의 미세 패턴 형성 방법 有权
    形成半导体器件精细图案的方法

    公开(公告)号:KR1020110011368A

    公开(公告)日:2011-02-08

    申请号:KR1020090068978

    申请日:2009-07-28

    Abstract: PURPOSE: A method for forming fine patterns in a semiconductor device is provided to improve the density of the patterns by forming the patterns using acid diffusion regions and solubility differences between materials. CONSTITUTION: A layer to be etched(112) is formed on a substrate(110). A plurality of pre-first mask patterns is formed on the layer to be etched. An acid solution layer covering the pre-first mask patterns is formed on the substrate. The upper side and the lateral side of the pre-first mask patterns are converted into an acid diffusion region(122). A plurality of first mask patterns(114a) is formed based on the acid diffusion region.

    Abstract translation: 目的:提供一种用于在半导体器件中形成精细图案的方法,以通过使用酸扩散区形成图案和材料之间的溶解度差来改善图案的密度。 构成:在基板(110)上形成被蚀刻层(112)。 在待蚀刻的层上形成多个预先掩模图案。 在基板上形成覆盖前置前掩模图案的酸溶液层。 预先将掩模图案的上侧和外侧转换成酸扩散区(122)。 基于酸扩散区形成多个第一掩模图案(114a)。

    반도체 메모리 장치 제조 방법
    6.
    发明公开
    반도체 메모리 장치 제조 방법 无效
    制造半导体存储器件的方法

    公开(公告)号:KR1020080004784A

    公开(公告)日:2008-01-10

    申请号:KR1020060063519

    申请日:2006-07-06

    Abstract: A method for fabricating a semiconductor memory device is provided to perform a manufacturing process of a mask pattern for a fine contact hole shape with a desired pitch. A method for fabricating a semiconductor memory device includes the steps of: providing a plurality of filler photosensitive patterns onto a semiconductor substrate(100) in which an insulating film, a hard mask film, and an anti-reflective film are sequentially laminated; forming a surrounding film surrounding the filler photosensitive patterns by a chemical attached process for reacting chemical materials with the filler photosensitive patterns; filling a gap between the surrounding films with the photosensitive materials and etching back the gap; etching the surrounding films; forming a mask pattern for an inverted contact hole shape by etching the anti-reflective film, the hard mask film, and the insulating film by using the filler photosensitive patterns and the photosensitive materials as an etching mask.

    Abstract translation: 提供一种用于制造半导体存储器件的方法,用于以期望的间距执行用于精细接触孔形状的掩模图案的制造工艺。 一种制造半导体存储器件的方法包括以下步骤:在绝缘膜,硬掩模膜和抗反射膜依次层叠的半导体衬底上提供多个填充光敏图案; 通过用于使化学材料与填充剂光敏图案反应的化学连接方法形成围绕填料光敏图案的周围膜; 用感光材料填充周围膜之间的间隙并蚀刻回间隙; 蚀刻周围的膜; 通过使用填充剂感光图案和感光材料作为蚀刻掩模,通过蚀刻抗反射膜,硬掩模膜和绝缘膜来形成用于反接触孔形状的掩模图案。

    액정표시장치 및 이의 구동방법
    7.
    发明公开
    액정표시장치 및 이의 구동방법 无效
    液晶显示器及其驱动方法

    公开(公告)号:KR1020060128143A

    公开(公告)日:2006-12-14

    申请号:KR1020050049339

    申请日:2005-06-09

    CPC classification number: G09G3/3688 G09G2320/0247 G09G2320/0257

    Abstract: A liquid crystal display and a driving method thereof are provided to detect a kickback voltage by detecting the pixel voltage applied to liquid crystals included in a pixel region, and to prevent an after image and flicker by supplying the optimal common voltage in consideration of the kickback voltage to a liquid crystal display panel. A liquid crystal display includes a data driving unit(400) for generating a data voltage(Vd) corresponding to a data signal input from the outside; a liquid crystal display panel(100) having a plurality of pixel regions(PA) and displaying an image corresponding to a pixel voltage(Vp) of the pixel region corresponding to the data voltage; and a driving voltage generating unit(700) for supplying a common voltage(Vcom) corresponding to the pixel voltage to the liquid crystal display panel.

    Abstract translation: 提供一种液晶显示器及其驱动方法,通过检测施加到像素区域中的液晶的像素电压来检测反冲电压,并且通过考虑到反射来提供最佳公共电压来防止后图像和闪烁 电压到液晶显示面板。 液晶显示器包括用于产生与从外部输入的数据信号相对应的数据电压(Vd)的数据驱动单元(400) 具有多个像素区域(PA)并且显示与对应于数据电压的像素区域的像素电压(Vp)相对应的图像的液晶显示面板(100); 以及用于将对应于像素电压的公共电压(Vcom)提供给液晶显示面板的驱动电压产生单元(700)。

    에치-백 공정을 이용한 패턴 형성 방법
    9.
    发明公开
    에치-백 공정을 이용한 패턴 형성 방법 无效
    使用回溯过程形成图案的方法

    公开(公告)号:KR1020130015429A

    公开(公告)日:2013-02-14

    申请号:KR1020110077413

    申请日:2011-08-03

    Abstract: PURPOSE: A method for forming a pattern with an etch-back process is provided to form a dual pattern by using organic materials in a semiconductor device manufacturing process. CONSTITUTION: A bottom layer(110) is formed on a substrate(100). An antireflection layer(140) with organic materials is formed on the bottom layer. A first mask pattern(150) is formed on the antireflection layer. A sacrificial layer covering the surfaces of the first mask patterns is formed. A part of the sacrificial layer near the first mask patterns is changed into a sacrificial pattern(160a).

    Abstract translation: 目的:提供用于形成具有回蚀工艺的图案的方法,以通过在半导体器件制造工艺中使用有机材料形成双重图案。 构成:底层(110)形成在基底(100)上。 在底层上形成有机材料的防反射层(140)。 在防反射层上形成第一掩模图案(150)。 形成覆盖第一掩模图案的表面的牺牲层。 第一掩模图案附近的牺牲层的一部分被改变为牺牲图案(160a)。

    더블 패턴닝 기술을 이용한 반도체 소자 및 제조방법
    10.
    发明公开
    더블 패턴닝 기술을 이용한 반도체 소자 및 제조방법 有权
    使用双模式技术的半导体器件及其制造方法

    公开(公告)号:KR1020110024587A

    公开(公告)日:2011-03-09

    申请号:KR1020090082645

    申请日:2009-09-02

    Abstract: PURPOSE: A semiconductor device and a manufacturing method thereof are provided to manufacture a high integrated device without investment in equipment by easily forming a fine pattern with a simple photolithography process. CONSTITUTION: A first mask pattern(115) is formed on a semiconductor substrate(100) with a preset space. A capping layer is formed on the side and upper side of the first mask pattern. A combination capping layer(135) ion-combined with the first mask pattern is formed by applying combination energy. A second mask layer(140) made of materials with lower solubility than the solubility of the combination capping layer is formed between the combination capping layers on the first mask. The second mask pattern is formed by removing the upper side of the second mask layer and the combination capping layer with a solvent.

    Abstract translation: 目的:提供一种半导体器件及其制造方法,以通过简单的光刻工艺容易地形成精细图案来制造高集成器件而无需投资设备。 构成:第一掩模图案(115)以预设空间形成在半导体衬底(100)上。 在第一掩模图案的侧面和上侧形成覆盖层。 通过施加组合能形成与第一掩模图案离子组合的组合覆盖层(135)。 在第一掩模上的组合覆盖层之间形成由比组合封盖层的溶解度低的溶解度的材料制成的第二掩模层(140)。 通过用溶剂去除第二掩模层的上侧和组合覆盖层来形成第二掩模图案。

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