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公开(公告)号：KR101575190B1
公开(公告)日：2015-12-08
申请号：KR1020100013113
申请日：2010-02-12
Applicant: 삼성전자주식회사
IPC: H01L21/302 , H01L21/8242 , H01L21/8247
CPC classification number: H01L21/31111 , H01L21/32134 , H01L21/76802 , H01L27/10852 , H01L27/10876 , H01L27/10894 , H01L27/11578 , H01L27/11582 , H01L28/91 , H01L29/4236 , H01L29/66621 , H01L29/66833 , H01L29/7926
Abstract: 본발명은반도체기판상의절연막트렌치측벽을유기소재고분자물질과 H-F기가반응하여식각액을생성선택식각하여, 윗면과바닥면의 CD가차이가없는깊은트렌치를만드는방법을제공한다. 반도체기판상에산화막을형성하고, 상기산화막에깊은트렌치를형성하고, 상기트렌치소정의깊이에유기소재고분자물질을채우고, 상기트렌치안의유기소재고분자물질에 H-F기가있는식각가스를공급하여유기소재고분자물질성분과 H-F기가반응하여부산물로물을만들어축적된 H-F기가습식식각액이되어선택적으로트렌치측벽을식각하고, 상기유기소재고분자물질을제거하면반도체기판상에윗면과바닥면의 CD가일정한산화막트렌치가형성된다.
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公开(公告)号：KR1020150042378A
公开(公告)日：2015-04-21
申请号：KR1020130120903
申请日：2013-10-10
Applicant: 삼성전자주식회사
IPC: H01L21/027
CPC classification number: H01L21/30604 , H01L21/0337 , H01L21/3086 , H01L21/3088 , H01L21/31111 , H01L21/31144 , H01L27/10852 , H01L27/11551 , H01L27/11578 , H01L21/0274 , H01L21/306
Abstract: 반도체소자의패턴형성방법이제공된다. 패턴형성방법은기판에포함된하부막상에제1 개구부들을가지는마스크막을형성하는것; 상기제1 개구부들을채우며상기마스크막상으로돌출된필라들을형성하는것; 상기필라들을포함하는상기기판상에블록공중합체막을형성하는것; 상기블록공중합체막을열처리하여, 제1 블록부및 제2 블록부를형성하는것; 상기제2 블록부를제거하여, 상기마스크막을노출시키는가이드개구부들을형성하는것; 및상기가이드개구부들에의해노출된상기마스크막을식각하여, 제2 개구부를형성하는것을포함할수 있다.
Abstract translation: 提供了形成半导体器件的图案的方法。 形成图案的方法包括以下步骤：在衬底上包括的下层上形成具有第一开口部分的掩模层; 形成柱，其填充所述第一开口部并突出在所述掩模层上; 在包括所述柱的所述基材上形成嵌段共聚物; 通过热处理所述嵌段共聚物形成第一嵌段部分和第二嵌段部分; 形成引导开口部分，以通过去除所述第二块部分而露出所述掩模层; 以及通过蚀刻由所述引导开口部暴露的掩模层来形成所述第二开口部。
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公开(公告)号：KR1020120101204A
公开(公告)日：2012-09-13
申请号：KR1020110013229
申请日：2011-02-15
Applicant: 삼성전자주식회사
IPC: H01L21/027 , G03F1/70
CPC classification number: G03F1/36 , H01L21/0274 , G03F1/70 , H01L21/0337
Abstract: PURPOSE: A method for manufacturing a photomask is provided to accurately manufacture the photomask for manufacturing a semiconductor device using optical proximity correction having fast speed and high accuracy by efficiently dividing a design layout. CONSTITUTION: A design layout is prepared(S100). Optical proximity correction is performed by dividing the design layout into a cell region and a peripheral circuit/core region(S200,S400). A correction cell region layout and a correction circuit/core region layout are formed(S300,S500). A photomask is formed using the correction cell region layout and the correction circuit/core region layout(S600). A semiconductor device is manufactured using the formed photomask(S700). [Reference numerals] (S100) Design layout; (S200) Optical proximity correction of a cell region; (S300) Forming an layout of the corrected cell region; (S400) Optical proximity correction of a peripheral circuit/a core region; (S500) Forming an layout of the peripheral circuit/the core region; (S600) Photo mask formation; (S700) Manufacturing a semiconductor device
Abstract translation: 目的：提供一种制造光掩模的方法，以通过有效地划分设计布局来精确地制造用于制造具有快速和高精度的光学邻近校正的半导体器件的光掩模。 规定：准备设计布局（S100）。 通过将设计布局划分为单元区域和外围电路/核心区域来进行光学邻近校正（S200，S400）。 形成校正单元区域布局和校正电路/核心区域布局（S300，S500）。 使用校正单元区域布局和校正电路/核心区域布局形成光掩模（S600）。 使用形成的光掩模制造半导体器件（S700）。 （附图标记）（S100）设计布局; （S200）单元区域的光学邻近校正; （S300）形成修正单元格区域的布局; （S400）外围电路/核心区域的光学邻近校正; （S500）形成外围电路/核心区域的布局; （S600）光罩形成; （S700）制造半导体器件
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公开(公告)号：KR101161604B1
公开(公告)日：2012-07-04
申请号：KR1020070004967
申请日：2007-01-16
Applicant: 삼성전자주식회사
Inventor： 문성호
IPC: H04N7/56
Abstract: 본 발명은 비디오 스트림의 립 싱크 제어 방법에 관한 것으로, 비디오 스트림이 수신되면, 수신된 비디오 스트림을 디코딩하고, 비디오 스트림 중 일부를 스킵(skip)할 것인지 여부를 결정하고, 비디오 스트림 중 일부를 스킵하기로 결정되면 비디오 스트림에 포함된 픽처들 중에 참조(reference)가 종료된 픽처들을 제외한 나머지 픽처들만을 화면에 출력함으로써, 화면의 열화 없이 비디오 스트림의 립 싱크를 제어할 수 있다.
립, 싱크, 참조, 스킵, 스트림-
公开(公告)号：KR1020110093213A
公开(公告)日：2011-08-18
申请号：KR1020100013113
申请日：2010-02-12
Applicant: 삼성전자주식회사
IPC: H01L21/302 , H01L21/8242 , H01L21/8247
CPC classification number: H01L21/31111 , H01L21/32134 , H01L21/76802 , H01L27/10852 , H01L27/10876 , H01L27/10894 , H01L27/11578 , H01L27/11582 , H01L28/91 , H01L29/4236 , H01L29/66621 , H01L29/66833 , H01L29/7926
Abstract: PURPOSE: A semiconductor which has a trench without a CD difference between the top and bottom of the semiconductor and a manufacturing method thereof are provided to form a capacitor electrode of a fixed CD on the top and the bottom of the semiconductor, thereby obtaining a DRAM cell with superior electrical features. CONSTITUTION: A trench(130) is filled with an organic material polymer. An etching gas is supplied to the trench. The etching gas includes an H-F group in the organic material polymer. The organic material polymer is reacted with the H-F group to generate a wet etchant. The sidewall of the trench is selectively etched. The trench of a fixed CD is formed on the top and the bottom of the semiconductor by eliminating the organic material polymer.
Abstract translation: 目的：提供在半导体的顶部和底部之间具有没有CD差异的沟槽的半导体及其制造方法，以在半导体的顶部和底部形成固定CD的电容器电极，从而获得DRAM 电池具有优越的电气特性。 构成：沟槽（130）填充有机材料聚合物。 蚀刻气体被供应到沟槽。 蚀刻气体包括有机材料聚合物中的H-F基团。 有机材料聚合物与H-F基团反应以产生湿蚀刻剂。 有选择地蚀刻沟槽的侧壁。 通过去除有机材料聚合物，在半导体的顶部和底部形成固定CD的沟槽。
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Patent Agency Ranking
公开(公告)号：KR1020110011368A
公开(公告)日：2011-02-08
申请号：KR1020090068978
申请日：2009-07-28
Applicant: 삼성전자주식회사
IPC: H01L21/027
CPC classification number: H01L21/32139 , G03F7/40 , H01L21/0273 , H01L21/0338 , H01L21/31144 , G03F7/423 , G03F7/70475
Abstract: PURPOSE: A method for forming fine patterns in a semiconductor device is provided to improve the density of the patterns by forming the patterns using acid diffusion regions and solubility differences between materials. CONSTITUTION: A layer to be etched(112) is formed on a substrate(110). A plurality of pre-first mask patterns is formed on the layer to be etched. An acid solution layer covering the pre-first mask patterns is formed on the substrate. The upper side and the lateral side of the pre-first mask patterns are converted into an acid diffusion region(122). A plurality of first mask patterns(114a) is formed based on the acid diffusion region.
Abstract translation: 目的：提供一种用于在半导体器件中形成精细图案的方法，以通过使用酸扩散区形成图案和材料之间的溶解度差来改善图案的密度。 构成：在基板（110）上形成被蚀刻层（112）。 在待蚀刻的层上形成多个预先掩模图案。 在基板上形成覆盖前置前掩模图案的酸溶液层。 预先将掩模图案的上侧和外侧转换成酸扩散区（122）。 基于酸扩散区形成多个第一掩模图案（114a）。
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公开(公告)号：KR1020100049824A
公开(公告)日：2010-05-13
申请号：KR1020080108823
申请日：2008-11-04
Applicant: 삼성전자주식회사
CPC classification number: G11C13/0011 , B82Y10/00 , G11C13/025 , G11C2213/15 , G11C2213/34 , G11C2213/72 , G11C2213/79 , H01L45/08 , H01L45/1233 , H01L45/141 , H01L45/145 , H01L45/149
Abstract: PURPOSE: A resistive memory device and a manufacturing method thereof are provided to form a uniform filament inside a resistive material by forming a nano filament seed including a carbon nano tube, a nano wire, or a nano particle. CONSTITUTION: An upper electrode(160) is positioned opposite to a bottom electrode(120). A resistive material layer pattern(150) is formed between the bottom electrode and the upper electrode. The resistive material layer pattern comprises a metal oxide. A nano filament seed(140) comprises a carbon nano tube erected from the surface of the bottom electrode surface, nano wire, or nano particle.
Abstract translation: 目的：提供电阻式存储器件及其制造方法，通过形成包括碳纳米管，纳米线或纳米粒子的纳米长丝种子，在电阻材料内形成均匀的细丝。 构成：上电极（160）与底电极（120）相对定位。 在底部电极和上部电极之间形成电阻材料层图案（150）。 电阻材料层图案包括金属氧化物。 纳米长丝种子（140）包括从底部电极表面，纳米线或纳米颗粒的表面竖立的碳纳米管。
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公开(公告)号：KR1020090099361A
公开(公告)日：2009-09-22
申请号：KR1020080024554
申请日：2008-03-17
Applicant: 삼성전자주식회사
Abstract: A carbon nano tube gas sensor and a manufacturing method thereof are provided to realize mass production with high sensitivity without depending on an electric characteristic of a carbon nano tube. A carbon nano tube gas sensor includes a lower electrode(120), a catalyst layer(125), an insulating layer pattern(130), an upper electrode(140), a carbon nano tube(150) and a power supply unit(160). The catalyst layer is formed on a lower electrode. The insulating layer pattern has an opening which passes to expose a surface of the catalyst layer. The upper electrode is formed on the insulating layer pattern. The opening passes through the upper electrode. The carbon nano tube grows in the catalyst layer exposed to the opening. The carbon nano tube comprises a gas absorption site. The power supply unit is connected to the lower electrode and the upper electrode. A detector(170) is installed between the lower electrode and the power supply unit. The detector detects a vibration number change of a carbon nano tube to determine whether to absorb gas.
Abstract translation: 提供一种碳纳米管气体传感器及其制造方法，以实现高灵敏度的批量生产，而不依赖于碳纳米管的电特性。 碳纳米管气体传感器包括下电极（120），催化剂层（125），绝缘层图案（130），上电极（140），碳纳米管（150）和电源单元（160） ）。 催化剂层形成在下电极上。 绝缘层图案具有通过以暴露催化剂层的表面的开口。 上部电极形成在绝缘层图案上。 开口穿过上电极。 碳纳米管在暴露于开口的催化剂层中生长。 碳纳米管包括吸气部位。 电源单元连接到下电极和上电极。 检测器（170）安装在下电极和电源单元之间。 检测器检测碳纳米管的振动数量变化，以确定是否吸收气体。
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公开(公告)号：KR1020090055205A
公开(公告)日：2009-06-02
申请号：KR1020070122001
申请日：2007-11-28
Applicant: 삼성전자주식회사
CPC classification number: B82B3/0009 , B82B3/0095 , B82Y40/00 , C01B32/162
Abstract: A method for laterally growing carbon nanotubes is provided to selectively and uniformly grow a plurality of carbon nanotubes on a substrate, thereby replacing metal wiring of a semiconductor device. A method for laterally growing carbon nanotubes comprises the following steps of: preparing a substrate(10) on which an insulating layer(20) is formed; forming a first material layer(30) containing a carbon nanotube-growable material on some parts of the insulating layer; wholly covering the first material layer with a second material layer(40) containing a carbon nanotube-inhibiting material; patterning the second material layer in order to expose a first side of the first material layer; forming a catalyst layer(54) on the first side by using a catalyst; and growing the plural carbon nanotubes(60) in horizontal direction of the surface of the substrate.
Abstract translation: 提供了用于横向生长碳纳米管的方法，以在基板上选择性地均匀地生长多个碳纳米管，从而代替半导体器件的金属布线。 横向生长碳纳米管的方法包括以下步骤：制备其上形成有绝缘层（20）的衬底（10）; 在绝缘层的一些部分上形成含有碳纳米管可生长材料的第一材料层（30）; 用包含碳纳米管抑制材料的第二材料层（40）完全覆盖第一材料层; 图案化第二材料层以暴露第一材料层的第一侧; 通过使用催化剂在第一面上形成催化剂层（54）; 以及在所述基板的表面的水平方向上生长所述多个碳纳米管（60）。
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公开(公告)号：KR1020090019523A
公开(公告)日：2009-02-25
申请号：KR1020070084031
申请日：2007-08-21
Applicant: 삼성전자주식회사
CPC classification number: H01L25/0657 , H01L23/481 , H01L2224/32145 , H01L2224/9202 , H01L2225/06513 , H01L2225/06517 , H01L2924/3011 , H01L21/76898
Abstract: A semiconductor package apparatus and its manufacturing method is provided to improve the reliability of the operation by improving capability / grounding property and controlling the impedance of the signal line easily. A semiconductor package apparatus and its manufacturing method include more than one semiconductor chips(10,100) and the circuit board(20) for setting up semiconductor chips. At lease one conductive surface is formed on the one side of each semiconductor chip and the electricity / grounding property is improved. The semiconductor chips are capable of electrically connected through a through-silicon via(30). A middle bonding layer is capable of being formed between semiconductor chips and circuit board.
Abstract translation: 提供半导体封装装置及其制造方法，通过提高能力/接地性能并且容易地控制信号线的阻抗来提高操作的可靠性。 半导体封装装置及其制造方法包括多于一个半导体芯片（10,100）和用于设置半导体芯片的电路板（20）。 在每个半导体芯片的一侧上形成至少一个导电表面，并且改善了电/接地性能。 半导体芯片能够通过硅通孔（30）电连接。 能够在半导体芯片和电路板之间形成中间接合层。
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