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    전도성 폴리머 패턴 형성 방법
    1.
    发明公开
    전도성 폴리머 패턴 형성 방법 无效
    导电聚合物的方法

    公开(公告)号：KR1020080048195A

    公开(公告)日：2008-06-02

    申请号：KR1020060118233

    申请日：2006-11-28

    Applicant: 삼성전자주식회사 ,  국민대학교산학협력단

    Inventor： 배양호 ,  정창오 ,  김병범 ,  이재갑 ,  권태욱

    IPC: G03F1/76 ,  G03F1/48

    CPC classification number: H01L51/0021 ,  G03F7/0755 ,  G03F7/165 ,  H01L51/0023

    Abstract: A method for forming a conductive polymer pattern is provided to improve the adhesive strength to an oxide layer and to enhance the precision of patterning. A method for forming a conductive polymer pattern comprises the steps of forming a self-assembly monolayer(30) on a substrate(10); patterning the self-assembly monolayer; forming a catalyst layer(60) on the self-assembly monolayer; and forming a conductive polymer layer on the self-assembly monolayer. Preferably an insulation layer(20) is formed between the substrate and the self-assembly monolayer. Preferably the conductive polymer layer is made of a polythiophene-based material or a polyaniline-based material.

    Abstract translation: 提供形成导电聚合物图案的方法以改善对氧化物层的粘合强度并提高图案化的精度。 形成导电聚合物图案的方法包括以下步骤：在基底（10）上形成自组装单层（30）; 图案化自组装单层; 在所述自组装单层上形成催化剂层（60）; 并在自组装单层上形成导电聚合物层。 优选地，在衬底和自组装单层之间形成绝缘层（20）。 优选地，导电聚合物层由基于聚噻吩的材料或基于聚苯胺的材料制成。

    박막 트랜지스터 표시판과 그 제조방법
    4.
    发明授权
    박막 트랜지스터 표시판과 그 제조방법 有权
    박막트랜지터터표시판과그제조방법

    公开(公告)号：KR101046928B1

    公开(公告)日：2011-07-06

    申请号：KR1020040076813

    申请日：2004-09-24

    Applicant: 삼성전자주식회사

    Inventor： 이제훈 ,  배양호 ,  조범석 ,  정창오

    IPC: G02F1/136

    CPC classification number: H01L29/458 ,  G02F1/1368 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1288

    Abstract: A thin film transistor array panel includes a source electrode and a drain electrode composed of a Mo alloy layer and a Cu layer, and an alloying element of the Mo alloy layer forms a nitride layer as a diffusion barrier against the Cu layer. The nitride layer can be formed between the Mo alloy layer and the Cu layer, between the Mo alloy layer and the semiconductor layer or in the Mo alloy layer. A method of fabricating a thin film transistor array panel includes forming a data line having a first conductive layer and a second conductive layer, the first conductive layer containing a Mo alloy and the second conductive layer containing Cu, and performing a nitrogen treatment so that an alloying element in the first conductive layer forms a nitride layer. The nitrogen treatment can be performed before forming the first conductive layer, after forming the first conductive layer, or during forming the first conductive layer.

    Abstract translation: 薄膜晶体管阵列面板包括由Mo合金层和Cu层构成的源电极和漏电极，并且Mo合金层的合金元素形成氮化物层作为对Cu层的扩散阻挡层。 氮化物层可以形成在Mo合金层和Cu层之间，Mo合金层和半导体层之间或Mo合金层中。 一种制造薄膜晶体管阵列面板的方法包括：形成具有第一导电层和第二导电层的数据线，所述第一导电层包含Mo合金并且所述第二导电层包含Cu，并且执行氮处理，使得 第一导电层中的合金元素形成氮化物层。 氮处理可以在形成第一导电层之前，形成第一导电层之后或者在形成第一导电层的过程中进行。

    금속 배선 형성 방법
    5.
    发明公开
    금속 배선 형성 방법 无效
    形成金属线的方法

    公开(公告)号：KR1020090100186A

    公开(公告)日：2009-09-23

    申请号：KR1020080032382

    申请日：2008-04-07

    Applicant: 삼성전자주식회사

    Inventor： 김장섭 ,  강윤호 ,  배양호 ,  윤필상 ,  정창오 ,  임순권 ,  박홍식 ,  닝홍롱 ,  김도현 ,  정승재

    IPC: H01L21/28

    CPC classification number: H01L21/76877 ,  H01L21/0273 ,  H01L21/308 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76871

    Abstract: PURPOSE: A method of forming a metal line is provided to prevent the waste of the metal material not by forming the metallic thin film at the upper part of the photoresist pattern in the seed layer formation. CONSTITUTION: The photoresist pattern(20) is formed at the upper part of the substrate(10). The trench(30) is formed on a substrate by etching the photoresist pattern as a mask. The seed layer is formed by applying the fluidized material in a metal within the trench. The metal layer is formed on the seed layer. A part of the photosensitive pattern becomes hydrophobic. The fluidized material contained in a metal includes the metal aerosol.

    Abstract translation: 目的：提供形成金属线的方法，以防止金属材料的浪费不是通过在种子层形成中在光致抗蚀剂图案的上部形成金属薄膜。 构成：在基板（10）的上部形成有光致抗蚀剂图案（20）。 通过蚀刻作为掩模的光致抗蚀剂图案，在基板上形成沟槽（30）。 种子层通过将流化材料施加在沟槽内的金属中而形成。 金属层形成在种子层上。 感光图案的一部分变得疏水。 包含在金属中的流化材料包括金属气溶胶。

    표시 기판
    6.
    发明公开
    표시 기판 无效
    显示基板

    公开(公告)号：KR1020090078527A

    公开(公告)日：2009-07-20

    申请号：KR1020080004401

    申请日：2008-01-15

    Applicant: 삼성전자주식회사

    Inventor： 김병범 ,  윤필상 ,  닝홍롱 ,  정창오 ,  이제훈 ,  박홍식 ,  윤주애 ,  배양호 ,  이병진

    IPC: G02F1/1345

    CPC classification number: G02F1/136286 ,  G02F2001/136295 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/4908

    Abstract: A display substrate is provided to prevent a wiring pattern from coming off by smoothly charging the gas which is generated when forming the wiring pattern. A pixel electrode is formed within a display area of an insulation substrate, and is connected to a thin film transistor. A signal wire is extended toward the display area from an external area on the insulation substrate. A pad part comprises the first and second closed-loop curves(L1,L2). The first and second closed-loop curves are formed in the external area, are filled in a trench of the insulation substrate, and expose the insulation substrate.

    Abstract translation: 提供显示基板，以防止在形成布线图案时产生的气体的平滑充电来使布线图案脱落。 像素电极形成在绝缘基板的显示区域内，并与薄膜晶体管连接。 信号线从绝缘基板上的外部区域向显示区域延伸。 垫部分包括第一和第二闭环曲线（L1，L2）。 第一和第二闭环曲线形成在外部区域中，填充在绝缘基板的沟槽中，并露出绝缘基板。

    박막 트랜지스터 기판 및 그 제조 방법
    7.
    发明公开
    박막 트랜지스터 기판 및 그 제조 방법 无效
    薄膜晶体管基板及其制造方法

    公开(公告)号：KR1020080043092A

    公开(公告)日：2008-05-16

    申请号：KR1020060111688

    申请日：2006-11-13

    Applicant: 삼성전자주식회사

    Inventor： 김도현 ,  이은국 ,  임순권 ,  정창오 ,  이제훈 ,  정양호

    IPC: G02F1/136

    CPC classification number: G02F1/136 ,  G02F1/13458 ,  G02F2201/123 ,  H01L29/786

    Abstract: A thin film transistor substrate and a method for manufacturing the thin film transistor substrate are provided to form a passivation layer on a thin film transistor using organic material to prevent reduction of zinc oxide, maintain current and voltage characteristics of a zinc oxide semiconductor and insulate the thin film transistor from a pixel electrode. A thin film transistor substrate includes a gate line(14), a data line(24), a thin film transistor, a pixel electrode(42), and an organic passivation layer. The gate line and the data line formed on a substrate crossing each other to define a pixel region. The thin film transistor is connected to the gate line and the data line and includes a zinc oxide semiconductor. The pixel electrode is connected to the thin film transistor. The organic passivation layer is formed between the thin film transistor and the pixel electrode and made of siloxane or BCB(Benzocyclobutene).

    Abstract translation: 提供薄膜晶体管基板和制造薄膜晶体管基板的方法，以在有机材料的薄膜晶体管上形成钝化层，以防止氧化锌的还原，保持氧化锌半导体的电流和电压特性并使 薄膜晶体管从像素电极。 薄膜晶体管基板包括栅极线（14），数据线（24），薄膜晶体管，像素电极（42）和有机钝化层。 形成在衬底上的栅极线和数据线彼此交叉以限定像素区域。 薄膜晶体管连接到栅极线和数据线，并且包括氧化锌半导体。 像素电极连接到薄膜晶体管。 有机钝化层形成在薄膜晶体管和像素电极之间，由硅氧烷或BCB（苯并环丁烯）制成。

    표시 기판의 제조 방법
    8.
    发明公开
    표시 기판의 제조 방법 无效
    制造显示基板的方法

    公开(公告)号：KR1020080035045A

    公开(公告)日：2008-04-23

    申请号：KR1020060101129

    申请日：2006-10-18

    Applicant: 삼성전자주식회사

    Inventor： 이은국 ,  정창오 ,  이제훈 ,  김도현 ,  오민석

    IPC: H01L29/786

    CPC classification number: H01L27/1288 ,  H01L29/66765

    Abstract: A method for fabricating a display substrate is provided to prevent etch gas used in a subsequent dry etch process from coming in contact with the etch surface of a second metal pattern by reflowing a photoresist pattern after a second metal pattern is formed during a process for fabricating a display substrate by using four masks. A first metal pattern includes a gate interconnection and a gate electrode(120) of a TFT. A gate insulation layer(130), an active layer(140), a metal layer and a first photoresist pattern are sequentially formed on the resultant structure. The metal layer is etched to be the same shape as the first photoresist pattern so that a second metal pattern including a data interconnection is formed. The first photoresist pattern is reflowed to form a second photoresist pattern covering the etch surface of the second metal pattern. The active layer is etched by using the second photoresist pattern. A predetermined thickness of the second photoresist pattern is etched to expose a part of the second metal pattern. The exposed second metal pattern is etched to form a source/drain electrode of the TFT. A pixel electrode is electrically connected to the drain electrode. A passivation layer can be formed between the second metal pattern and the pixel electrode.

    Abstract translation: 提供了一种用于制造显示基板的方法，以防止在随后的干蚀刻工艺中使用的蚀刻气体在制造工艺期间形成第二金属图案之后通过回流光致抗蚀剂图案与第二金属图案的蚀刻表面接触 通过使用四个掩模的显示基板。 第一金属图案包括TFT互连和TFT的栅电极（120）。 在所得结构上依次形成栅极绝缘层（130），有源层（140），金属层和第一光致抗蚀剂图案。 金属层被蚀刻成与第一光致抗蚀剂图案相同的形状，从而形成包括数据互连的第二金属图案。 第一光致抗蚀剂图案被回流以形成覆盖第二金属图案的蚀刻表面的第二光致抗蚀剂图案。 通过使用第二光致抗蚀剂图案蚀刻有源层。 蚀刻第二光致抗蚀剂图案的预定厚度以暴露第二金属图案的一部分。 蚀刻暴露的第二金属图案以形成TFT的源极/漏极。 像素电极电连接到漏电极。 可以在第二金属图案和像素电极之间形成钝化层。

    표시기판의 제조 방법
    9.
    发明公开
    표시기판의 제조 방법 无效
    制造显示器基板的方法

    公开(公告)号：KR1020070053490A

    公开(公告)日：2007-05-25

    申请号：KR1020050111326

    申请日：2005-11-21

    Applicant: 삼성전자주식회사

    Inventor： 닝홍롱 ,  정창오 ,  이제훈 ,  배양호 ,  김도현 ,  김병범

    IPC: G02F1/136

    CPC classification number: G02F1/136227 ,  G02F1/136286 ,  G02F2001/13625 ,  G02F2201/123 ,  H01L27/1288

    Abstract: 표시기판의 품질과 제조 공정의 생산성을 향상시키는 표시기판의 제조 방법이 개시된다. 표시기판의 제조 방법은 베이스 기판 위의 게이트 패턴 영역에 게이트 패턴을 형성하는 단계와, 상기 게이트 패턴이 형성된 베이스 기판 위에 정의된 소스 패턴 영역에 구리를 무전해도금(electroless plating)하여 소스 패턴을 형성하는 단계와, 상기 소스 패턴이 형성된 베이스 기판 위에 투명 도전층을 형성하는 단계와, 상기 투명 도전층을 식각하여 화소 전극을 형성하는 단계를 포함한다. 따라서, 표시기판의 응답속도가 향상되고 구리층의 에칭 공정이 생략되어 제조 공정의 생산성이 향상된다.
    구리, 질화탈탄, 무전해도금, 게이트, 소스, 에칭

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